Commit d0081bd0 authored by Guido Günther's avatar Guido Günther Committed by Shawn Guo
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arm64: dts: imx8mq: Add NWL MIPI DSI controller 



Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by
default. This also adds the necessary port to LCDIF.

Signed-off-by: default avatarGuido Günther <agx@sigxcpu.org>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Tested-by: default avatarMartin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent d3762a47

arch/arm64/boot/dts/freescale/imx8mq.dtsi

+49 −0
Original line number Diff line number Diff line
@@ -523,6 +523,12 @@ 
						  <&clk IMX8MQ_VIDEO_PLL1_OUT>;

				assigned-clock-rates = <0>, <0>, <0>, <594000000>;

				status = "disabled";



				port@0 {

					lcdif_mipi_dsi: endpoint {

						remote-endpoint = <&mipi_dsi_lcdif_in>;

					};

				};

			};



			iomuxc: pinctrl@30330000 {
@@ -899,6 +905,49 @@ 
				};

			};



			mipi_dsi: mipi-dsi@30a00000 {

				compatible = "fsl,imx8mq-nwl-dsi";

				reg = <0x30a00000 0x300>;

				clocks = <&clk IMX8MQ_CLK_DSI_CORE>,

					 <&clk IMX8MQ_CLK_DSI_AHB>,

					 <&clk IMX8MQ_CLK_DSI_IPG_DIV>,

					 <&clk IMX8MQ_CLK_DSI_PHY_REF>,

					 <&clk IMX8MQ_CLK_LCDIF_PIXEL>;

				clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";

				assigned-clocks = <&clk IMX8MQ_CLK_DSI_AHB>,

						  <&clk IMX8MQ_CLK_DSI_CORE>,

						  <&clk IMX8MQ_CLK_DSI_IPG_DIV>;

				assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>,

							 <&clk IMX8MQ_SYS1_PLL_266M>;

				assigned-clock-rates = <80000000>, <266000000>, <20000000>;

				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

				mux-controls = <&mux 0>;

				power-domains = <&pgc_mipi>;

				phys = <&dphy>;

				phy-names = "dphy";

				resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>,

					 <&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,

					 <&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>,

					 <&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>;

				reset-names = "byte", "dpi", "esc", "pclk";

				status = "disabled";



				ports {

					#address-cells = <1>;

					#size-cells = <0>;



					port@0 {

						reg = <0>;

						#address-cells = <1>;

						#size-cells = <0>;

						mipi_dsi_lcdif_in: endpoint@0 {

							reg = <0>;

							remote-endpoint = <&lcdif_mipi_dsi>;

						};

					};

				};

			};



			dphy: dphy@30a00300 {

				compatible = "fsl,imx8mq-mipi-dphy";

				reg = <0x30a00300 0x100>;