Commit cfc2b00e authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Bartosz Golaszewski
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gpio: dwapb: Make the irqchip immutable 



Commit 6c846d02 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the dwapb driver:

    gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the dwapb driver immutable.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarDamien Le Moal <damien.lemoal@opensource.wdc.com>
Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
parent c680c6a8

drivers/gpio/gpio-dwapb.c

+24 −14
Original line number Diff line number Diff line
@@ -95,7 +95,6 @@ struct dwapb_context { 
#endif



struct dwapb_gpio_port_irqchip {

	struct irq_chip		irqchip;

	unsigned int		nr_irqs;

	unsigned int		irq[DWAPB_MAX_GPIOS];

};
@@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d) 
{

	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);

	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);

	irq_hw_number_t hwirq = irqd_to_hwirq(d);

	unsigned long flags;

	u32 val;



	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);

	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));

	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);

	dwapb_write(gpio, GPIO_INTMASK, val);

	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);



	gpiochip_disable_irq(gc, hwirq);

}



static void dwapb_irq_unmask(struct irq_data *d)

{

	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);

	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);

	irq_hw_number_t hwirq = irqd_to_hwirq(d);

	unsigned long flags;

	u32 val;



	gpiochip_enable_irq(gc, hwirq);



	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);

	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));

	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);

	dwapb_write(gpio, GPIO_INTMASK, val);

	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);

}
@@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable) 


	return 0;

}

#else

#define dwapb_irq_set_wake	NULL

#endif



static const struct irq_chip dwapb_irq_chip = {

	.name		= DWAPB_DRIVER_NAME,

	.irq_ack	= dwapb_irq_ack,

	.irq_mask	= dwapb_irq_mask,

	.irq_unmask	= dwapb_irq_unmask,

	.irq_set_type	= dwapb_irq_set_type,

	.irq_enable	= dwapb_irq_enable,

	.irq_disable	= dwapb_irq_disable,

	.irq_set_wake	= dwapb_irq_set_wake,

	.flags		= IRQCHIP_IMMUTABLE,

	GPIOCHIP_IRQ_RESOURCE_HELPERS,

};



static int dwapb_gpio_set_debounce(struct gpio_chip *gc,

				   unsigned offset, unsigned debounce)

{
@@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, 
	girq->default_type = IRQ_TYPE_NONE;



	port->pirq = pirq;

	pirq->irqchip.name = DWAPB_DRIVER_NAME;

	pirq->irqchip.irq_ack = dwapb_irq_ack;

	pirq->irqchip.irq_mask = dwapb_irq_mask;

	pirq->irqchip.irq_unmask = dwapb_irq_unmask;

	pirq->irqchip.irq_set_type = dwapb_irq_set_type;

	pirq->irqchip.irq_enable = dwapb_irq_enable;

	pirq->irqchip.irq_disable = dwapb_irq_disable;

#ifdef CONFIG_PM_SLEEP

	pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;

#endif



	/*

	 * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
@@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, 
		girq->parent_handler = dwapb_irq_handler;

	}



	girq->chip = &pirq->irqchip;

	gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);



	return;