Commit ce91bc00 authored by Rohit Agarwal's avatar Rohit Agarwal Committed by Bjorn Andersson
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ARM: dts: qcom: sdx65: Add support for APCS block 



The APCS block on SDX65 acts as a mailbox controller and also provides
clock output for the Cortex A7 CPU.

Signed-off-by: default avatarRohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1645505785-2271-5-git-send-email-quic_rohiagar@quicinc.com
parent 02c55535

arch/arm/boot/dts/qcom-sdx65.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -129,6 +129,15 @@ 
			#clock-cells = <0>;

		};



		apcs: mailbox@17810000 {

			compatible = "qcom,sdx55-apcs-gcc", "syscon";

			reg = <0x17810000 0x2000>;

			#mbox-cells = <1>;

			clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;

			clock-names = "ref", "pll", "aux";

			#clock-cells = <0>;

		};



		timer@17820000 {

			#address-cells = <1>;

			#size-cells = <1>;