Commit cdf5b020 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Aubrey Li
Browse files

x86/microcode/amd: Use cached microcode for AP load

mainline inclusion
from mainline-v6.7-rc1
commit 5af05b8d51a8e3ff5905663655c0f46d1aaae44a
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8XRMW


CVE: NA

--------------------------------

Now that the microcode cache is initialized before the APs are brought
up, there is no point in scanning builtin/initrd microcode during AP
loading.

Convert the AP loader to utilize the cache, which in turn makes the CPU
hotplug callback which applies the microcode after initrd/builtin is
gone, obsolete as the early loading during late hotplug operations
including the resume path depends now only on the cache.

Intel-SIG: commit 5af05b8d51a8 x86/microcode/amd: Use cached microcode for AP load.
Microcode restructuring backport.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231017211723.243426023@linutronix.de


[ Aubrey Li: amend commit log ]
Signed-off-by: default avatarAubrey Li <aubrey.li@linux.intel.com>
parent d1497a53
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