Commit cd499e19 authored by Beata Michalska's avatar Beata Michalska Committed by lwx1174606
Browse files

sched/doc: Update the CPU capacity asymmetry bits

mainline inclusion
from mainline-v5.14-rc1
commit adf3c31e
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I7MWAW
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=adf3c31e18b765ea24eba7b0c1efc076b8ee3d55



----------------------------------------------------------------------

Update the documentation bits referring to capacity aware scheduling
with regards to newly introduced SD_ASYM_CPUCAPACITY_FULL sched_domain
flag.

Signed-off-by: default avatarBeata Michalska <beata.michalska@arm.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: default avatarValentin Schneider <valentin.schneider@arm.com>
Reviewed-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
Link: https://lore.kernel.org/r/20210603140627.8409-4-beata.michalska@arm.com


Signed-off-by: default avatarJie Liu <liujie375@h-partners.com>
parent bf98f63d
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