Commit adf3c31e authored Jun 03, 2021 by Beata Michalska Committed by Peter Zijlstra Jun 24, 2021

sched/doc: Update the CPU capacity asymmetry bits



Update the documentation bits referring to capacity aware scheduling
with regards to newly introduced SD_ASYM_CPUCAPACITY_FULL sched_domain
flag.

Signed-off-by: Beata Michalska <beata.michalska@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Link: https://lore.kernel.org/r/20210603140627.8409-4-beata.michalska@arm.com

parent c744dc4a

Documentation/scheduler/sched-capacity.rst

+4 −2

Original line number	Diff line number	Diff line
		@@ -284,8 +284,10 @@ whether the system exhibits asymmetric CPU capacities. Should that be the
		case:

		- The sched_asym_cpucapacity static key will be enabled.
		- The SD_ASYM_CPUCAPACITY flag will be set at the lowest sched_domain level that
		spans all unique CPU capacity values.
		- The SD_ASYM_CPUCAPACITY_FULL flag will be set at the lowest sched_domain
		level that spans all unique CPU capacity values.
		- The SD_ASYM_CPUCAPACITY flag will be set for any sched_domain that spans
		CPUs with any range of asymmetry.

		The sched_asym_cpucapacity static key is intended to guard sections of code that
		cater to asymmetric CPU capacity systems. Do note however that said key is

Documentation/scheduler/sched-energy.rst

+1 −1

Original line number	Diff line number	Diff line
		@@ -328,7 +328,7 @@ section lists these dependencies and provides hints as to how they can be met.

		As mentioned in the introduction, EAS is only supported on platforms with
		asymmetric CPU topologies for now. This requirement is checked at run-time by
		looking for the presence of the SD_ASYM_CPUCAPACITY flag when the scheduling
		looking for the presence of the SD_ASYM_CPUCAPACITY_FULL flag when the scheduling
		domains are built.

		See Documentation/scheduler/sched-capacity.rst for requirements to be met for this