Unverified Commit c8ed7ce2 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
Browse files

ASoC: SOF: Intel: ipc4: Read the interrupt reason registers at the same time 



Read both registers as the first step in the interrupt handler to make
sure that we are handling the event which triggered the interrupt.

The delayed reading of the target request register might reflect incorrect
information about the reason why the interrupt was risen.

Note also that the IPC3 interrupt handler is implemented in this way also.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: default avatarKai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarRander Wang <rander.wang@intel.com>
Link: https://lore.kernel.org/r/20221018124008.6846-3-peter.ujfalusi@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 2d91d571

sound/soc/sof/intel/cnl.c

+1 −1
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ irqreturn_t cnl_ipc4_irq_thread(int irq, void *context) 
	u32 hipcida, hipctdr;



	hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDA);

	hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDR);

	if (hipcida & CNL_DSP_REG_HIPCIDA_DONE) {

		/* DSP received the message */

		snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR,
@@ -51,7 +52,6 @@ irqreturn_t cnl_ipc4_irq_thread(int irq, void *context) 
		ipc_irq = true;

	}



	hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDR);

	if (hipctdr & CNL_DSP_REG_HIPCTDR_BUSY) {

		/* Message from DSP (reply or notification) */

		u32 hipctdd = snd_sof_dsp_read(sdev, HDA_DSP_BAR,

sound/soc/sof/intel/hda-ipc.c

+2 −1
Original line number Diff line number Diff line
@@ -126,6 +126,8 @@ irqreturn_t hda_dsp_ipc4_irq_thread(int irq, void *context) 
	u32 hipcie, hipct;



	hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);

	hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);



	if (hipcie & HDA_DSP_REG_HIPCIE_DONE) {

		/* DSP received the message */

		snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL,
@@ -135,7 +137,6 @@ irqreturn_t hda_dsp_ipc4_irq_thread(int irq, void *context) 
		ipc_irq = true;

	}



	hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);

	if (hipct & HDA_DSP_REG_HIPCT_BUSY) {

		/* Message from DSP (reply or notification) */

		u32 hipcte = snd_sof_dsp_read(sdev, HDA_DSP_BAR,

sound/soc/sof/intel/mtl.c

+1 −1
Original line number Diff line number Diff line
@@ -497,6 +497,7 @@ static irqreturn_t mtl_ipc_irq_thread(int irq, void *context) 
	u32 hipctdr;



	hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDA);

	hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDR);



	/* reply message from DSP */

	if (hipcida & MTL_DSP_REG_HFIPCXIDA_DONE) {
@@ -509,7 +510,6 @@ static irqreturn_t mtl_ipc_irq_thread(int irq, void *context) 
		ipc_irq = true;

	}



	hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDR);

	if (hipctdr & MTL_DSP_REG_HFIPCXTDR_BUSY) {

		/* Message from DSP (reply or notification) */

		u32 extension = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDDY);