Unverified Commit c708140e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'socfpga_dts_updates_for_v6.6' of... 

Merge tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.6
- Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions
- Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet
- Add initial support for Agilex5

* tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA
  dt-bindings: clock: add Intel Agilex5 clock manager
  dt-bindings: reset: add reset IDs for Agilex5
  dt-bindings: intel: Add Intel Agilex5 compatible
  arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb"
  arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions
  arm64: dts: agilex/stratix10: Updated QSPI Flash layout for UBIFS
  arm64: dts: agilex/stratix10/n5x: fix dtbs_check for rstmgr
  arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node
  arm64: dts: socfpga: stratix10: fix dtbs_check warning for usbphy
  arm64: dts: socfpga: agilex/stratix10: fix dtbs_check warnings for sram

Link: https://lore.kernel.org/r/20230819161418.931258-1-dinguyen@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents ecd2dc2f 2d599bc4

Documentation/devicetree/bindings/arm/intel,socfpga.yaml

+5 −0
Original line number Diff line number Diff line
@@ -21,6 +21,11 @@ properties: 
              - intel,socfpga-agilex-n6000

              - intel,socfpga-agilex-socdk

          - const: intel,socfpga-agilex

      - description: Agilex5 boards

        items:

          - enum:

              - intel,socfpga-agilex5-socdk

          - const: intel,socfpga-agilex5



additionalProperties: true

Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml

0 → 100644
+40 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/intel,agilex5-clkmgr.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel SoCFPGA Agilex5 clock manager



maintainers:

  - Dinh Nguyen <dinguyen@kernel.org>



description:

  The Intel Agilex5 Clock Manager is an integrated clock controller, which

  generates and supplies clock to all the modules.



properties:

  compatible:

    const: intel,agilex5-clkmgr



  reg:

    maxItems: 1



  '#clock-cells':

    const: 1



required:

  - compatible

  - reg

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    clkmgr: clock-controller@10d10000 {

      compatible = "intel,agilex5-clkmgr";

      reg = <0x10d10000 0x1000>;

      #clock-cells = <1>;

    };

...

arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -440,7 +440,7 @@ 
			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;

			clock-names = "stmmaceth", "ptp_ref";

			resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			reset-names = "stmmaceth", "ahb";

			snps,axi-config = <&socfpga_axi_setup>;

			status = "disabled";

		};
@@ -460,7 +460,7 @@ 
			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;

			clock-names = "stmmaceth", "ptp_ref";

			resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			reset-names = "stmmaceth", "ahb";

			snps,axi-config = <&socfpga_axi_setup>;

			status = "disabled";

		};
@@ -480,7 +480,7 @@ 
			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;

			clock-names = "stmmaceth", "ptp_ref";

			resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			reset-names = "stmmaceth", "ahb";

			snps,axi-config = <&socfpga_axi_setup>;

			status = "disabled";

		};

arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi

+11 −9
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ 
			interrupt-names = "macirq";

			mac-address = [00 00 00 00 00 00];

			resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			reset-names = "stmmaceth", "ahb";

			clocks = <&clkmgr STRATIX10_EMAC0_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;

			clock-names = "stmmaceth", "ptp_ref";

			tx-fifo-depth = <16384>;
@@ -171,7 +171,7 @@ 
			interrupt-names = "macirq";

			mac-address = [00 00 00 00 00 00];

			resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			reset-names = "stmmaceth", "ahb";

			clocks = <&clkmgr STRATIX10_EMAC1_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;

			clock-names = "stmmaceth", "ptp_ref";

			tx-fifo-depth = <16384>;
@@ -189,7 +189,7 @@ 
			interrupt-names = "macirq";

			mac-address = [00 00 00 00 00 00];

			resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			reset-names = "stmmaceth", "ahb";

			clocks = <&clkmgr STRATIX10_EMAC2_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;

			clock-names = "stmmaceth", "ptp_ref";

			tx-fifo-depth = <16384>;
@@ -331,6 +331,9 @@ 
		ocram: sram@ffe00000 {

			compatible = "mmio-sram";

			reg = <0xffe00000 0x100000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0xffe00000 0x100000>;

		};



		pdma: dma-controller@ffda0000 {
@@ -484,12 +487,6 @@ 
			status = "disabled";

		};



		usbphy0: usbphy@0 {

			#phy-cells = <0>;

			compatible = "usb-nop-xceiv";

			status = "okay";

		};



		usb0: usb@ffb00000 {

			compatible = "snps,dwc2";

			reg = <0xffb00000 0x40000>;
@@ -636,4 +633,9 @@ 
			};

		};

	};



	usbphy0: usbphy0 {

		compatible = "usb-nop-xceiv";

		#phy-cells = <0>;

	};

};

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts

+6 −6
Original line number Diff line number Diff line
@@ -38,10 +38,10 @@ 
		};

	};



	memory {

	memory@80000000 {

		device_type = "memory";

		/* We expect the bootloader to fill in the reg */

		reg = <0 0 0 0>;

		reg = <0 0x80000000 0 0>;

	};



	ref_033v: regulator-v-ref {
@@ -202,12 +202,12 @@ 


			qspi_boot: partition@0 {

				label = "Boot and fpga data";

				reg = <0x0 0x03FE0000>;

				reg = <0x0 0x04200000>;

			};



			qspi_rootfs: partition@3FE0000 {

				label = "Root Filesystem - JFFS2";

				reg = <0x03FE0000 0x0C020000>;

			root: partition@4200000 {

				label = "Root Filesystem - UBIFS";

				reg = <0x04200000 0x0BE00000>;

			};

		};

	};