Unverified Commit ecd2dc2f authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'riscv-dt-for-v6.6-pt2' of... 

Merge tag 'riscv-dt-for-v6.6-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into soc/dt

RISC-V Devicetrees for v6.6 Part 2

T-Head:
Add a second minimal devicetree for the second board using the th1520
SoC, the BeagleV Ahead. As with the Lichee Pi 4a, this is sufficient
only for booting to a console, with work on the mmc, clocks and ethernet
sides of things under way. A relicense to a dual licence for the
existing devicetree files is also done, for good measure.
RISC-V Devicetrees for v6.6-pt2

StarFive:
Fix the sort order of some nodes that I resolved incorrectly during a
merge conflict.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.6-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: change TH1520 files to dual license
  riscv: dts: thead: add BeagleV Ahead board device tree
  dt-bindings: riscv: Add BeagleV Ahead board compatibles
  riscv: dts: starfive: fix jh7110 qspi sort order

Link: https://lore.kernel.org/r/20230819-unwieldy-railing-9bba2b176aa7@spud


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 6522fbd4 a3ce3ff2

Documentation/devicetree/bindings/riscv/thead.yaml

+4 −0
Original line number Diff line number Diff line
@@ -17,6 +17,10 @@ properties: 
    const: '/'

  compatible:

    oneOf:

      - description: BeagleV Ahead single board computer

        items:

          - const: beagle,beaglev-ahead

          - const: thead,th1520

      - description: Sipeed Lichee Pi 4A board for the Sipeed Lichee Module 4A

        items:

          - enum:

arch/riscv/boot/dts/starfive/jh7110.dtsi

+19 −19
Original line number Diff line number Diff line
@@ -676,25 +676,6 @@ 
			status = "disabled";

		};



		qspi: spi@13010000 {

			compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";

			reg = <0x0 0x13010000 0x0 0x10000>,

			      <0x0 0x21000000 0x0 0x400000>;

			interrupts = <25>;

			clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,

				 <&syscrg JH7110_SYSCLK_QSPI_AHB>,

				 <&syscrg JH7110_SYSCLK_QSPI_APB>;

			clock-names = "ref", "ahb", "apb";

			resets = <&syscrg JH7110_SYSRST_QSPI_APB>,

				 <&syscrg JH7110_SYSRST_QSPI_AHB>,

				 <&syscrg JH7110_SYSRST_QSPI_REF>;

			reset-names = "qspi", "qspi-ocp", "rstc_ref";

			cdns,fifo-depth = <256>;

			cdns,fifo-width = <4>;

			cdns,trigger-address = <0x0>;

			status = "disabled";

		};



		spi3: spi@12070000 {

			compatible = "arm,pl022", "arm,primecell";

			reg = <0x0 0x12070000 0x0 0x10000>;
@@ -767,6 +748,25 @@ 
			#thermal-sensor-cells = <0>;

		};



		qspi: spi@13010000 {

			compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";

			reg = <0x0 0x13010000 0x0 0x10000>,

			      <0x0 0x21000000 0x0 0x400000>;

			interrupts = <25>;

			clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,

				 <&syscrg JH7110_SYSCLK_QSPI_AHB>,

				 <&syscrg JH7110_SYSCLK_QSPI_APB>;

			clock-names = "ref", "ahb", "apb";

			resets = <&syscrg JH7110_SYSRST_QSPI_APB>,

				 <&syscrg JH7110_SYSRST_QSPI_AHB>,

				 <&syscrg JH7110_SYSRST_QSPI_REF>;

			reset-names = "qspi", "qspi-ocp", "rstc_ref";

			cdns,fifo-depth = <256>;

			cdns,fifo-width = <4>;

			cdns,trigger-address = <0x0>;

			status = "disabled";

		};



		syscrg: clock-controller@13020000 {

			compatible = "starfive,jh7110-syscrg";

			reg = <0x0 0x13020000 0x0 0x10000>;

arch/riscv/boot/dts/thead/Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb
 
dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb th1520-beaglev-ahead.dtb

arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts

0 → 100644
+61 −0
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>

 * Copyright (C) 2023 Drew Fustini <dfustini@baylibre.com>

 */



/dts-v1/;



#include "th1520.dtsi"



/ {

	model = "BeagleV Ahead";

	compatible = "beagle,beaglev-ahead", "thead,th1520";



	aliases {

		gpio0 = &gpio0;

		gpio1 = &gpio1;

		gpio2 = &gpio2;

		gpio3 = &gpio3;

		serial0 = &uart0;

		serial1 = &uart1;

		serial2 = &uart2;

		serial3 = &uart3;

		serial4 = &uart4;

		serial5 = &uart5;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory@0 {

		device_type = "memory";

		reg = <0x0  0x00000000  0x1 0x00000000>;



	};

};



&osc {

	clock-frequency = <24000000>;

};



&osc_32k {

	clock-frequency = <32768>;

};



&apb_clk {

	clock-frequency = <62500000>;

};



&uart_sclk {

	clock-frequency = <100000000>;

};



&dmac0 {

	status = "okay";

};



&uart0 {

	status = "okay";

};

arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>

 */