Commit c5eb2361 authored by Dave Jiang's avatar Dave Jiang Committed by Xiaochen Shen
Browse files

dmaengine: idxd: change MSIX allocation based on per wq activation

mainline inclusion
from mainline-v5.17
commit 403a2e23
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I596WO


CVE: NA

Intel-SIG: commit 403a2e23 dmaengine: idxd: change MSIX allocation based on per wq activation.
Incremental backporting patches for DSA/IAA on Intel Xeon platform.

--------------------------------

Change the driver where WQ interrupt is requested only when wq is being
enabled. This new scheme set things up so that request_threaded_irq() is
only called when a kernel wq type is being enabled. This also sets up for
future interrupt request where different interrupt handler such as wq
occupancy interrupt can be setup instead of the wq completion interrupt.

Not calling request_irq() until the WQ actually needs an irq also prevents
wasting of CPU irq vectors on x86 systems, which is a limited resource.

idxd_flush_pending_descs() is moved to device.c since descriptor flushing
is now part of wq disable rather than shutdown().

Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/163942149487.2412839.6691222855803875848.stgit@djiang5-desk3.ch.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarXiaochen Shen <xiaochen.shen@intel.com>
parent 2898fc69
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