Commit c4aab244 authored by Weili Qian's avatar Weili Qian Committed by Herbert Xu
Browse files

crypto: hisilicon - enable new error types for QM 



QM adds 'qm_mailbox_timeout' and 'qm_flr_timeout' hardware error types on
Kunpeng930. This patch enables the new error types and configures the error
types as NFE.

Signed-off-by: default avatarWeili Qian <qianweili@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 10594d1e

drivers/crypto/hisilicon/qm.c

+4 −2
Original line number Diff line number Diff line
@@ -136,9 +136,9 @@ 
#define QM_DFX_CNT_CLR_CE		0x100118



#define QM_ABNORMAL_INT_SOURCE		0x100000

#define QM_ABNORMAL_INT_SOURCE_CLR	GENMASK(12, 0)

#define QM_ABNORMAL_INT_SOURCE_CLR	GENMASK(14, 0)

#define QM_ABNORMAL_INT_MASK		0x100004

#define QM_ABNORMAL_INT_MASK_VALUE	0x1fff

#define QM_ABNORMAL_INT_MASK_VALUE	0x7fff

#define QM_ABNORMAL_INT_STATUS		0x100008

#define QM_ABNORMAL_INT_SET		0x10000c

#define QM_ABNORMAL_INF00		0x100010
@@ -391,6 +391,8 @@ static const struct hisi_qm_hw_error qm_hw_error[] = { 
	{ .int_msk = BIT(10), .msg = "qm_db_timeout" },

	{ .int_msk = BIT(11), .msg = "qm_of_fifo_of" },

	{ .int_msk = BIT(12), .msg = "qm_db_random_invalid" },

	{ .int_msk = BIT(13), .msg = "qm_mailbox_timeout" },

	{ .int_msk = BIT(14), .msg = "qm_flr_timeout" },

	{ /* sentinel */ }

};

drivers/crypto/hisilicon/qm.h

+4 −1
Original line number Diff line number Diff line
@@ -64,10 +64,13 @@ 
#define QM_DB_TIMEOUT			BIT(10)

#define QM_OF_FIFO_OF			BIT(11)

#define QM_DB_RANDOM_INVALID		BIT(12)

#define QM_MAILBOX_TIMEOUT		BIT(13)

#define QM_FLR_TIMEOUT			BIT(14)



#define QM_BASE_NFE	(QM_AXI_RRESP | QM_AXI_BRESP | QM_ECC_MBIT | \

			 QM_ACC_GET_TASK_TIMEOUT | QM_DB_TIMEOUT | \

			 QM_OF_FIFO_OF | QM_DB_RANDOM_INVALID)

			 QM_OF_FIFO_OF | QM_DB_RANDOM_INVALID | \

			 QM_MAILBOX_TIMEOUT | QM_FLR_TIMEOUT)

#define QM_BASE_CE			QM_ECC_1BIT



#define QM_Q_DEPTH			1024