Unverified Commit c496e294 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!12306 [openEuler-24.03-LTS][linux-6.6.y sync] Backport 6.6.51-6.6.52 LTS Patches 

Merge Pull Request from: @wenzhiwei11 
 
git log --oneline v6.6.51..v6.6.52 | wc -l
89
81+8
Merged commits(8)

 net: hns3: use correct release function during uninitialization
 platform/x86: panasonic-laptop: Fix SINF array out of bounds accesses
 mptcp: pm: Fix uaf in __timer_delete_sync
 net/mlx5: Fix bridge mode operations when there are no VFs
 netfilter: nft_socket: fix sk refcount leaks
 net: dpaa: Pad packets to ETH_ZLEN
 dma-buf: heaps: Fix off-by-one in CMA heap fault handler
 ASoC: meson: axg-card: fix 'use-after-free' 
 
Link:https://gitee.com/openeuler/kernel/pulls/12306

 

Reviewed-by: default avatarZhang Peng <zhangpeng362@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 5d590c4c e2c58a16

arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts

+1 −1
Original line number Diff line number Diff line
@@ -332,7 +332,7 @@ 


	pmic {

		pmic_int_l: pmic-int-l {

			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;

			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;

		};

	};

arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi

+33 −3
Original line number Diff line number Diff line
@@ -119,6 +119,22 @@ 
	drive-impedance-ohm = <33>;

};



&gpio3 {

	/*

	 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module

	 * eMMC and SPI flash powered-down initially (in fact it keeps the

	 * reset signal asserted). BIOS_DISABLE_OVERRIDE pin allows to override

	 * that signal so that eMMC and SPI can be used regardless of the state

	 * of the signal.

	 */

	bios-disable-override-hog {

		gpios = <RK_PD5 GPIO_ACTIVE_LOW>;

		gpio-hog;

		line-name = "bios_disable_override";

		output-high;

	};

};



&gmac {

	assigned-clocks = <&cru SCLK_RMII_SRC>;

	assigned-clock-parents = <&clkin_gmac>;
@@ -374,6 +390,7 @@ 


&i2s0 {

	pinctrl-0 = <&i2s0_2ch_bus>;

	pinctrl-1 = <&i2s0_2ch_bus_bclk_off>;

	rockchip,playback-channels = <2>;

	rockchip,capture-channels = <2>;

	status = "okay";
@@ -382,8 +399,8 @@ 
/*

 * As Q7 does not specify neither a global nor a RX clock for I2S these

 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.

 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent

 * conflicts.

 * Therefore we have to redefine the i2s0_2ch_bus and i2s0_2ch_bus_bclk_off

 * definitions to prevent conflicts.

 */

&i2s0_2ch_bus {

	rockchip,pins =
@@ -393,6 +410,14 @@ 
		<3 RK_PD7 1 &pcfg_pull_none>;

};



&i2s0_2ch_bus_bclk_off {

	rockchip,pins =

		<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,

		<3 RK_PD2 1 &pcfg_pull_none>,

		<3 RK_PD3 1 &pcfg_pull_none>,

		<3 RK_PD7 1 &pcfg_pull_none>;

};



&io_domains {

	status = "okay";

	bt656-supply = <&vcc_1v8>;
@@ -408,9 +433,14 @@ 


&pinctrl {

	pinctrl-names = "default";

	pinctrl-0 = <&q7_thermal_pin>;

	pinctrl-0 = <&q7_thermal_pin &bios_disable_override_hog_pin>;



	gpios {

		bios_disable_override_hog_pin: bios-disable-override-hog-pin {

			rockchip,pins =

				<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;

		};



		q7_thermal_pin: q7-thermal-pin {

			rockchip,pins =

				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;

arch/powerpc/kernel/setup-common.c

+1 −0
Original line number Diff line number Diff line
@@ -950,6 +950,7 @@ void __init setup_arch(char **cmdline_p) 
	mem_topology_setup();

	/* Set max_mapnr before paging_init() */

	set_max_mapnr(max_pfn);

	high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);



	/*

	 * Release secondary cpus out of their spinloops at 0x60 now that

arch/powerpc/mm/mem.c

+0 −2
Original line number Diff line number Diff line
@@ -287,8 +287,6 @@ void __init mem_init(void) 
	swiotlb_init(ppc_swiotlb_enable, ppc_swiotlb_flags);

#endif



	high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);



	kasan_late_init();



	memblock_free_all();

arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -204,6 +204,8 @@ 


&mmc0 {

	max-frequency = <100000000>;

	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;

	assigned-clock-rates = <50000000>;

	bus-width = <8>;

	cap-mmc-highspeed;

	mmc-ddr-1_8v;
@@ -220,6 +222,8 @@ 


&mmc1 {

	max-frequency = <100000000>;

	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;

	assigned-clock-rates = <50000000>;

	bus-width = <4>;

	no-sdio;

	no-mmc;