Commit e2c58a16 authored Sep 22, 2023 by William Qiu Committed by Wen Zhiwei Oct 22, 2024

riscv: dts: starfive: add assigned-clock* to limit frquency

stable inclusion
from stable-v6.6.52
commit bd9c3c2d7e44ee896e6248d3acffe8d0f43b27c2
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IAYXOD

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=bd9c3c2d7e44ee896e6248d3acffe8d0f43b27c2



--------------------------------

commit af571133f7ae028ec9b5fdab78f483af13bf28d3 upstream.

In JH7110 SoC, we need to go by-pass mode, so we need add the
assigned-clock* properties to limit clock frquency.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: WangYuli <wangyuli@uniontech.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Wen Zhiwei <wenzhiwei@kylinos.cn>

parent 909c949e

arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

+4 −0

Original line number	Diff line number	Diff line
		@@ -204,6 +204,8 @@

		&mmc0 {
		max-frequency = <100000000>;
		assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
		assigned-clock-rates = <50000000>;
		bus-width = <8>;
		cap-mmc-highspeed;
		mmc-ddr-1_8v;
		@@ -220,6 +222,8 @@

		&mmc1 {
		max-frequency = <100000000>;
		assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
		assigned-clock-rates = <50000000>;
		bus-width = <4>;
		no-sdio;
		no-mmc;