arm64/sve: Skip flushing Z registers with 128 bit vectors

mainline inclusion
from mainline-v5.14-rc1
commit ad4711f9
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/II8E73O
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=ad4711f962e08eff8d6e9b03f9670b1af6ea9395



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When the SVE vector length is 128 bits then there are no bits in the Z
registers which are not shared with the V registers so we can skip them
when zeroing state not shared with FPSIMD, this results in a minor
performance improvement.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210512151131.27877-4-broonie@kernel.org


Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Wang ShaoBo <bobo.shaobowang@huawei.com>