Commit c325712b authored by Cédric Le Goater's avatar Cédric Le Goater Committed by Michael Ellerman
Browse files

powerpc/powernv/pci: Rework pnv_opal_pci_msi_eoi() 



pnv_opal_pci_msi_eoi() is called from KVM to EOI passthrough interrupts
when in real mode. Adding MSI domain broke the hack using the
'ioda.irq_chip' field to deduce the owning PHB. Fix that by using the
IRQ chip data in the MSI domain.

The 'ioda.irq_chip' field is now unused and could be removed from the
pnv_phb struct.

Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210701132750.1475580-30-clg@kaod.org
parent 5cd69651

arch/powerpc/include/asm/pnv-pci.h

+1 −1
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num); 
void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);

int pnv_cxl_get_irq_count(struct pci_dev *dev);

struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev);

int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq);

int64_t pnv_opal_pci_msi_eoi(struct irq_data *d);

bool is_pnv_opal_msi(struct irq_chip *chip);



#ifdef CONFIG_CXL_BASE

arch/powerpc/kvm/book3s_hv_rm_xics.c

+4 −4
Original line number Diff line number Diff line
@@ -706,6 +706,7 @@ static int ics_rm_eoi(struct kvm_vcpu *vcpu, u32 irq) 
		icp->rm_eoied_irq = irq;

	}



	/* Handle passthrough interrupts */

	if (state->host_irq) {

		++vcpu->stat.pthru_all;

		if (state->intr_cpu != -1) {
@@ -759,12 +760,12 @@ int xics_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr) 


static unsigned long eoi_rc;



static void icp_eoi(struct irq_chip *c, u32 hwirq, __be32 xirr, bool *again)

static void icp_eoi(struct irq_data *d, u32 hwirq, __be32 xirr, bool *again)

{

	void __iomem *xics_phys;

	int64_t rc;



	rc = pnv_opal_pci_msi_eoi(c, hwirq);

	rc = pnv_opal_pci_msi_eoi(d);



	if (rc)

		eoi_rc = rc;
@@ -872,8 +873,7 @@ long kvmppc_deliver_irq_passthru(struct kvm_vcpu *vcpu, 
		icp_rm_deliver_irq(xics, icp, irq, false);



	/* EOI the interrupt */

	icp_eoi(irq_desc_get_chip(irq_map->desc), irq_map->r_hwirq, xirr,

		again);

	icp_eoi(irq_desc_get_irq_data(irq_map->desc), irq_map->r_hwirq, xirr, again);



	if (check_too_hard(xics, icp) == H_TOO_HARD)

		return 2;

arch/powerpc/platforms/powernv/pci-ioda.c

+13 −4
Original line number Diff line number Diff line
@@ -1963,12 +1963,21 @@ void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, 
	pe->dma_setup_done = true;

}



int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq)

/*

 * Called from KVM in real mode to EOI passthru interrupts. The ICP

 * EOI is handled directly in KVM in kvmppc_deliver_irq_passthru().

 *

 * The IRQ data is mapped in the PCI-MSI domain and the EOI OPAL call

 * needs an HW IRQ number mapped in the XICS IRQ domain. The HW IRQ

 * numbers of the in-the-middle MSI domain are vector numbers and it's

 * good enough for OPAL. Use that.

 */

int64_t pnv_opal_pci_msi_eoi(struct irq_data *d)

{

	struct pnv_phb *phb = container_of(chip, struct pnv_phb,

					   ioda.irq_chip);

	struct pci_controller *hose = irq_data_get_irq_chip_data(d->parent_data);

	struct pnv_phb *phb = hose->private_data;



	return opal_pci_msi_eoi(phb->opal_id, hw_irq);

	return opal_pci_msi_eoi(phb->opal_id, d->parent_data->hwirq);

}



/*