Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c +2 −0 Original line number Diff line number Diff line Loading @@ -1432,6 +1432,8 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) grctx->r419eb0(gr); if (grctx->r419e00) grctx->r419e00(gr); if (grctx->r418e94) grctx->r418e94(gr); } #define CB_RESERVED 0x80000 Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h +1 −0 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ struct gf100_grctx_func { void (*r418800)(struct gf100_gr *); void (*r419eb0)(struct gf100_gr *); void (*r419e00)(struct gf100_gr *); void (*r418e94)(struct gf100_gr *); }; extern const struct gf100_grctx_func gf100_grctx; Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c +10 −2 Original line number Diff line number Diff line Loading @@ -27,6 +27,14 @@ * PGRAPH context implementation ******************************************************************************/ static void gm200_grctx_generate_r418e94(struct gf100_gr *gr) { struct nvkm_device *device = gr->base.engine.subdev.device; nvkm_mask(device, 0x418e94, 0xffffffff, 0xc4230000); nvkm_mask(device, 0x418e4c, 0xffffffff, 0x70000000); } void gm200_grctx_generate_smid_config(struct gf100_gr *gr) { Loading Loading @@ -96,8 +104,7 @@ gm200_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) nvkm_wr32(device, 0x404154, idle_timeout); gf100_gr_mthd(gr, gr->fuc_method); nvkm_mask(device, 0x418e94, 0xffffffff, 0xc4230000); nvkm_mask(device, 0x418e4c, 0xffffffff, 0x70000000); grctx->r418e94(gr); } void Loading Loading @@ -144,4 +151,5 @@ gm200_grctx = { .gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr, .tpc_mask = gm200_grctx_generate_tpc_mask, .smid_config = gm200_grctx_generate_smid_config, .r418e94 = gm200_grctx_generate_r418e94, }; Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c +2 −0 Original line number Diff line number Diff line Loading @@ -1432,6 +1432,8 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) grctx->r419eb0(gr); if (grctx->r419e00) grctx->r419e00(gr); if (grctx->r418e94) grctx->r418e94(gr); } #define CB_RESERVED 0x80000 Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h +1 −0 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ struct gf100_grctx_func { void (*r418800)(struct gf100_gr *); void (*r419eb0)(struct gf100_gr *); void (*r419e00)(struct gf100_gr *); void (*r418e94)(struct gf100_gr *); }; extern const struct gf100_grctx_func gf100_grctx; Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c +10 −2 Original line number Diff line number Diff line Loading @@ -27,6 +27,14 @@ * PGRAPH context implementation ******************************************************************************/ static void gm200_grctx_generate_r418e94(struct gf100_gr *gr) { struct nvkm_device *device = gr->base.engine.subdev.device; nvkm_mask(device, 0x418e94, 0xffffffff, 0xc4230000); nvkm_mask(device, 0x418e4c, 0xffffffff, 0x70000000); } void gm200_grctx_generate_smid_config(struct gf100_gr *gr) { Loading Loading @@ -96,8 +104,7 @@ gm200_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) nvkm_wr32(device, 0x404154, idle_timeout); gf100_gr_mthd(gr, gr->fuc_method); nvkm_mask(device, 0x418e94, 0xffffffff, 0xc4230000); nvkm_mask(device, 0x418e4c, 0xffffffff, 0x70000000); grctx->r418e94(gr); } void Loading Loading @@ -144,4 +151,5 @@ gm200_grctx = { .gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr, .tpc_mask = gm200_grctx_generate_tpc_mask, .smid_config = gm200_grctx_generate_smid_config, .r418e94 = gm200_grctx_generate_r418e94, };