Commit c224d89c authored by Dnyaneshwar Bhadane's avatar Dnyaneshwar Bhadane Committed by Radhakrishna Sripada
Browse files

drm/i915/bdw: s/BDW/BROADWELL for platform/subplatform defines 



Follow consistent naming convention. Replace BDW with
BROADWELL.

Signed-off-by: default avatarDnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-3-dnyaneshwar.bhadane@intel.com
parent 927a8e38

drivers/gpu/drm/i915/display/intel_cdclk.c

+2 −2
Original line number Diff line number Diff line
@@ -3200,9 +3200,9 @@ void intel_update_max_cdclk(struct drm_i915_private *dev_priv) 
		 */

		if (intel_de_read(dev_priv, FUSE_STRAP) & HSW_CDCLK_LIMIT)

			dev_priv->display.cdclk.max_cdclk_freq = 450000;

		else if (IS_BDW_ULX(dev_priv))

		else if (IS_BROADWELL_ULX(dev_priv))

			dev_priv->display.cdclk.max_cdclk_freq = 450000;

		else if (IS_BDW_ULT(dev_priv))

		else if (IS_BROADWELL_ULT(dev_priv))

			dev_priv->display.cdclk.max_cdclk_freq = 540000;

		else

			dev_priv->display.cdclk.max_cdclk_freq = 675000;

drivers/gpu/drm/i915/display/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -7377,7 +7377,7 @@ static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv) 
	if (DISPLAY_VER(dev_priv) >= 9)

		return false;



	if (IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv))

	if (IS_HASWELL_ULT(dev_priv) || IS_BROADWELL_ULT(dev_priv))

		return false;



	if (HAS_PCH_LPT_H(dev_priv) &&

drivers/gpu/drm/i915/gt/intel_workarounds.c

+1 −1
Original line number Diff line number Diff line
@@ -420,7 +420,7 @@ static void bdw_ctx_workarounds_init(struct intel_engine_cs *engine, 
		     /* WaForceContextSaveRestoreNonCoherent:bdw */

		     HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |

		     /* WaDisableFenceDestinationToSLM:bdw (pre-prod) */

		     (IS_BDW_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0));

		     (IS_BROADWELL_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0));

}



static void chv_ctx_workarounds_init(struct intel_engine_cs *engine,

drivers/gpu/drm/i915/i915_drv.h

+3 −3
Original line number Diff line number Diff line
@@ -593,11 +593,11 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, 
	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)

#define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \

				    (INTEL_DEVID(i915) & 0xFF00) == 0x0C00)

#define IS_BDW_ULT(i915) \

#define IS_BROADWELL_ULT(i915) \

	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)

#define IS_BDW_ULX(i915) \

#define IS_BROADWELL_ULX(i915) \

	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)

#define IS_BDW_GT3(i915)	(IS_BROADWELL(i915) && \

#define IS_BROADWELL_GT3(i915)	(IS_BROADWELL(i915) && \

				 INTEL_INFO(i915)->gt == 3)

#define IS_HASWELL_ULT(i915) \

	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)

drivers/gpu/drm/i915/soc/intel_pch.c

+5 −5
Original line number Diff line number Diff line
@@ -32,21 +32,21 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) 
		drm_WARN_ON(&dev_priv->drm,

			    !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));

		drm_WARN_ON(&dev_priv->drm,

			    IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv));

			    IS_HASWELL_ULT(dev_priv) || IS_BROADWELL_ULT(dev_priv));

		return PCH_LPT;

	case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:

		drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n");

		drm_WARN_ON(&dev_priv->drm,

			    !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));

		drm_WARN_ON(&dev_priv->drm,

			    !IS_HASWELL_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));

			    !IS_HASWELL_ULT(dev_priv) && !IS_BROADWELL_ULT(dev_priv));

		return PCH_LPT;

	case INTEL_PCH_WPT_DEVICE_ID_TYPE:

		drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n");

		drm_WARN_ON(&dev_priv->drm,

			    !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));

		drm_WARN_ON(&dev_priv->drm,

			    IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv));

			    IS_HASWELL_ULT(dev_priv) || IS_BROADWELL_ULT(dev_priv));

		/* WPT is LPT compatible */

		return PCH_LPT;

	case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
@@ -54,7 +54,7 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) 
		drm_WARN_ON(&dev_priv->drm,

			    !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));

		drm_WARN_ON(&dev_priv->drm,

			    !IS_HASWELL_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));

			    !IS_HASWELL_ULT(dev_priv) && !IS_BROADWELL_ULT(dev_priv));

		/* WPT is LPT compatible */

		return PCH_LPT;

	case INTEL_PCH_SPT_DEVICE_ID_TYPE:
@@ -186,7 +186,7 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv, 
		id = INTEL_PCH_CNP_DEVICE_ID_TYPE;

	else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))

		id = INTEL_PCH_SPT_DEVICE_ID_TYPE;

	else if (IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv))

	else if (IS_HASWELL_ULT(dev_priv) || IS_BROADWELL_ULT(dev_priv))

		id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;

	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))

		id = INTEL_PCH_LPT_DEVICE_ID_TYPE;