Commit c1c6de6c authored by Pali Rohár's avatar Pali Rohár Committed by Zheng Zengkai
Browse files

irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x

stable inclusion
from stable-v5.10.121
commit be7ae7cd1c2d2898644ad826c47961a73e51eea3
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I5L6CQ

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=be7ae7cd1c2d2898644ad826c47961a73e51eea3



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commit a3d66a76 upstream.

Register ARMADA_370_XP_INT_FABRIC_MASK_OFFS is Armada 370 and XP specific
and on new Armada platforms it has different meaning. It does not configure
Performance Counter Overflow interrupt masking. So do not touch this
register on non-A370/XP platforms (A375, A38x and A39x).

Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Cc: stable@vger.kernel.org
Fixes: 28da06df ("irqchip: armada-370-xp: Enable the PMU interrupts")
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220425113706.29310-1-pali@kernel.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
Acked-by: default avatarXie XiuQi <xiexiuqi@huawei.com>
parent 58183f69
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