Commit c066ef2f authored by Youling Tang's avatar Youling Tang Committed by Hongchen Zhang
Browse files

LoongArch: Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs 

LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I736HO



--------------------------------

Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs directly.
This is a preparation for subsequent patches.

Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
Change-Id: I4b64da6d5ab46b6bc561b74f39224765f6892758
parent fd5abfad

arch/loongarch/include/asm/stackframe.h

+9 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <asm/asm.h>

#include <asm/asmmacro.h>

#include <asm/asm-offsets.h>

#include <asm/addrspace.h>

#include <asm/loongarch.h>

#include <asm/thread_info.h>
@@ -36,6 +37,14 @@ 
	cfi_restore \reg \offset \docfi

	.endm



/* Jump to the runtime virtual address. */

	.macro JUMP_VIRT_ADDR temp1 temp2

	li.d	\temp1, CACHE_BASE

	pcaddi	\temp2, 0

	or	\temp1, \temp1, \temp2

	jirl	zero, \temp1, 0xc

	.endm



	.macro BACKUP_T0T1

	csrwr	t0, EXCEPTION_KS0

	csrwr	t1, EXCEPTION_KS1

arch/loongarch/kernel/head.S

+4 −8
Original line number Diff line number Diff line
@@ -48,11 +48,8 @@ SYM_CODE_START(kernel_entry) # kernel entry point 
	li.d		t0, CSR_DMW1_INIT	# CA, PLV0, 0x9000 xxxx xxxx xxxx

	csrwr		t0, LOONGARCH_CSR_DMWIN1



	/* We might not get launched at the address the kernel is linked to,

	   so we jump there.  */

	la.abs		t0, 0f

	jr		t0

0:

	JUMP_VIRT_ADDR	t0, t1



	/* Enable PG */

	li.w		t0, 0xb0		# PLV=0, IE=0, PG=1

	csrwr		t0, LOONGARCH_CSR_CRMD
@@ -104,9 +101,8 @@ SYM_CODE_START(smpboot_entry) 
	li.d		t0, CSR_DMW1_INIT	# CA, PLV0

	csrwr		t0, LOONGARCH_CSR_DMWIN1



	la.abs		t0, 0f

	jr		t0

0:

	JUMP_VIRT_ADDR	t0, t1



	/* Enable PG */

	li.w		t0, 0xb0		# PLV=0, IE=0, PG=1

	csrwr		t0, LOONGARCH_CSR_CRMD

arch/loongarch/power/hibernate_asm.S

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 


.text

SYM_FUNC_START(swsusp_arch_save)

	la.abs t0, saved_regs

	la.pcrel t0, saved_regs

	PTR_S ra, t0, PT_R1

	PTR_S sp, t0, PT_R3

	PTR_S fp, t0, PT_R22

arch/loongarch/power/suspend_asm.S

+2 −3
Original line number Diff line number Diff line
@@ -113,9 +113,8 @@ SYM_CODE_START(loongarch_wakeup_start) 
	li.d	t0, CSR_DMW1_INIT	# CA, PLV0

	csrwr	t0, LOONGARCH_CSR_DMWIN1



	la.abs	t0, 0f

	jirl	zero, t0, 0

0:

	JUMP_VIRT_ADDR	t0, t1



	la.pcrel	t0, acpi_saved_sp

	ld.d	sp, t0, 0

	SETUP_WAKEUP