Commit c0426c44 authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
Browse files

wifi: rtw89: 8852b: adjust quota to avoid SER L1 caused by access null page



Though SER can recover this case, traffic can get stuck for a while. Fix it
by adjusting page quota to avoid hardware access null page of CMAC/DMAC.

Fixes: a1cb0971 ("wifi: rtw89: 8852b: configure DLE mem")
Fixes: 3e870b48 ("wifi: rtw89: 8852b: add HFC quota arrays")
Cc: stable@vger.kernel.org
Tested-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Link: https://github.com/lwfinger/rtw89/issues/226#issuecomment-1520776761
Link: https://github.com/lwfinger/rtw89/issues/240


Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230426034737.24870-1-pkshih@realtek.com
parent c7ab7a29
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -1425,6 +1425,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
	.wde_size4 = {RTW89_WDE_PG_64, 0, 4096,},
	/* PCIE 64 */
	.wde_size6 = {RTW89_WDE_PG_64, 512, 0,},
	/* 8852B PCIE SCC */
	.wde_size7 = {RTW89_WDE_PG_64, 510, 2,},
	/* DLFW */
	.wde_size9 = {RTW89_WDE_PG_64, 0, 1024,},
	/* 8852C DLFW */
@@ -1449,6 +1451,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
	.wde_qt4 = {0, 0, 0, 0,},
	/* PCIE 64 */
	.wde_qt6 = {448, 48, 0, 16,},
	/* 8852B PCIE SCC */
	.wde_qt7 = {446, 48, 0, 16,},
	/* 8852C DLFW */
	.wde_qt17 = {0, 0, 0,  0,},
	/* 8852C PCIE SCC */
+2 −0
Original line number Diff line number Diff line
@@ -792,6 +792,7 @@ struct rtw89_mac_size_set {
	const struct rtw89_dle_size wde_size0;
	const struct rtw89_dle_size wde_size4;
	const struct rtw89_dle_size wde_size6;
	const struct rtw89_dle_size wde_size7;
	const struct rtw89_dle_size wde_size9;
	const struct rtw89_dle_size wde_size18;
	const struct rtw89_dle_size wde_size19;
@@ -804,6 +805,7 @@ struct rtw89_mac_size_set {
	const struct rtw89_wde_quota wde_qt0;
	const struct rtw89_wde_quota wde_qt4;
	const struct rtw89_wde_quota wde_qt6;
	const struct rtw89_wde_quota wde_qt7;
	const struct rtw89_wde_quota wde_qt17;
	const struct rtw89_wde_quota wde_qt18;
	const struct rtw89_ple_quota ple_qt4;
+14 −14
Original line number Diff line number Diff line
@@ -18,25 +18,25 @@
	RTW8852B_FW_BASENAME "-" __stringify(RTW8852B_FW_FORMAT_MAX) ".bin"

static const struct rtw89_hfc_ch_cfg rtw8852b_hfc_chcfg_pcie[] = {
	{5, 343, grp_0}, /* ACH 0 */
	{5, 343, grp_0}, /* ACH 1 */
	{5, 343, grp_0}, /* ACH 2 */
	{5, 343, grp_0}, /* ACH 3 */
	{5, 341, grp_0}, /* ACH 0 */
	{5, 341, grp_0}, /* ACH 1 */
	{4, 342, grp_0}, /* ACH 2 */
	{4, 342, grp_0}, /* ACH 3 */
	{0, 0, grp_0}, /* ACH 4 */
	{0, 0, grp_0}, /* ACH 5 */
	{0, 0, grp_0}, /* ACH 6 */
	{0, 0, grp_0}, /* ACH 7 */
	{4, 344, grp_0}, /* B0MGQ */
	{4, 344, grp_0}, /* B0HIQ */
	{4, 342, grp_0}, /* B0MGQ */
	{4, 342, grp_0}, /* B0HIQ */
	{0, 0, grp_0}, /* B1MGQ */
	{0, 0, grp_0}, /* B1HIQ */
	{40, 0, 0} /* FWCMDQ */
};

static const struct rtw89_hfc_pub_cfg rtw8852b_hfc_pubcfg_pcie = {
	448, /* Group 0 */
	446, /* Group 0 */
	0, /* Group 1 */
	448, /* Public Max */
	446, /* Public Max */
	0 /* WP threshold */
};

@@ -49,13 +49,13 @@ static const struct rtw89_hfc_param_ini rtw8852b_hfc_param_ini_pcie[] = {
};

static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = {
	[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6,
			   &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6,
			   &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18,
	[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size7,
			   &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt7,
			   &rtw89_mac_size.wde_qt7, &rtw89_mac_size.ple_qt18,
			   &rtw89_mac_size.ple_qt58},
	[RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size6,
			   &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6,
			   &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18,
	[RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size7,
			   &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt7,
			   &rtw89_mac_size.wde_qt7, &rtw89_mac_size.ple_qt18,
			   &rtw89_mac_size.ple_qt_52b_wow},
	[RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9,
			    &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4,