Commit bf75213f authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'phy-25G-BASE-R' 



Steen Hegelund says:

====================
Add 25G BASE-R support

This series add the 25G BASE-R mode to the set modes supported.
This mode is used by the Sparx5 Switch for its 25G SerDes.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents abf6420e 21e0c59e

Documentation/devicetree/bindings/net/ethernet-controller.yaml

+1 −0
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ properties: 
      - 10gbase-kr

      - usxgmii

      - 10gbase-r

      - 25gbase-r



  phy-mode:

    $ref: "#/properties/phy-connection-type"

Documentation/networking/phy.rst

+6 −0
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@@ -292,6 +292,12 @@ Some of the interface modes are described below: 
    Note: due to legacy usage, some 10GBASE-R usage incorrectly makes

    use of this definition.



``PHY_INTERFACE_MODE_25GBASER``

    This is the IEEE 802.3 PCS Clause 107 defined 25GBASE-R protocol.

    The PCS is identical to 10GBASE-R, i.e. 64B/66B encoded

    running 2.5 as fast, giving a fixed bit rate of 25.78125 Gbaud.

    Please refer to the IEEE standard for further information.



``PHY_INTERFACE_MODE_100BASEX``

    This defines IEEE 802.3 Clause 24.  The link operates at a fixed data

    rate of 125Mpbs using a 4B/5B encoding scheme, resulting in an underlying

drivers/net/phy/phylink.c

+5 −0
Original line number Diff line number Diff line
@@ -312,6 +312,11 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 
			phylink_set(pl->supported, 5000baseT_Full);

			break;



		case PHY_INTERFACE_MODE_25GBASER:

			phylink_set(pl->supported, 25000baseCR_Full);

			phylink_set(pl->supported, 25000baseKR_Full);

			phylink_set(pl->supported, 25000baseSR_Full);

			fallthrough;

		case PHY_INTERFACE_MODE_USXGMII:

		case PHY_INTERFACE_MODE_10GKR:

		case PHY_INTERFACE_MODE_10GBASER:

drivers/net/phy/sfp-bus.c

+5 −0
Original line number Diff line number Diff line
@@ -392,6 +392,11 @@ EXPORT_SYMBOL_GPL(sfp_parse_support); 
phy_interface_t sfp_select_interface(struct sfp_bus *bus,

				     unsigned long *link_modes)

{

	if (phylink_test(link_modes, 25000baseCR_Full) ||

	    phylink_test(link_modes, 25000baseKR_Full) ||

	    phylink_test(link_modes, 25000baseSR_Full))

		return PHY_INTERFACE_MODE_25GBASER;



	if (phylink_test(link_modes, 10000baseCR_Full) ||

	    phylink_test(link_modes, 10000baseSR_Full) ||

	    phylink_test(link_modes, 10000baseLR_Full) ||

include/linux/phy.h

+4 −0
Original line number Diff line number Diff line
@@ -112,6 +112,7 @@ extern const int phy_10gbit_features_array[1]; 
 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI

 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface

 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR

 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR

 * @PHY_INTERFACE_MODE_USXGMII:  Universal Serial 10GE MII

 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN

 * @PHY_INTERFACE_MODE_MAX: Book keeping
@@ -147,6 +148,7 @@ typedef enum { 
	PHY_INTERFACE_MODE_XAUI,

	/* 10GBASE-R, XFI, SFI - single lane 10G Serdes */

	PHY_INTERFACE_MODE_10GBASER,

	PHY_INTERFACE_MODE_25GBASER,

	PHY_INTERFACE_MODE_USXGMII,

	/* 10GBASE-KR - with Clause 73 AN */

	PHY_INTERFACE_MODE_10GKR,
@@ -223,6 +225,8 @@ static inline const char *phy_modes(phy_interface_t interface) 
		return "xaui";

	case PHY_INTERFACE_MODE_10GBASER:

		return "10gbase-r";

	case PHY_INTERFACE_MODE_25GBASER:

		return "25gbase-r";

	case PHY_INTERFACE_MODE_USXGMII:

		return "usxgmii";

	case PHY_INTERFACE_MODE_10GKR: