Commit 21e0c59e authored by Steen Hegelund's avatar Steen Hegelund Committed by David S. Miller
Browse files

net: phylink: Add 25G BASE-R support 



Add 25gbase-r interface type and speed to phylink.
This is needed for the Sparx5 switch.

Signed-off-by: default avatarSteen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: default avatarBjarni Jonasson <bjarni.jonasson@microchip.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 452d2c6f

drivers/net/phy/phylink.c

+5 −0
Original line number Diff line number Diff line
@@ -312,6 +312,11 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 
			phylink_set(pl->supported, 5000baseT_Full);

			break;



		case PHY_INTERFACE_MODE_25GBASER:

			phylink_set(pl->supported, 25000baseCR_Full);

			phylink_set(pl->supported, 25000baseKR_Full);

			phylink_set(pl->supported, 25000baseSR_Full);

			fallthrough;

		case PHY_INTERFACE_MODE_USXGMII:

		case PHY_INTERFACE_MODE_10GKR:

		case PHY_INTERFACE_MODE_10GBASER: