Commit bec81918 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
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ARM: dts: qcom: ipq4019: align clocks in I2C with DT schema 



The DT schema expects clocks core-iface order.  No functional change.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405063451.12011-5-krzysztof.kozlowski@linaro.org
parent 17c15a4c

arch/arm/boot/dts/qcom-ipq4019.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -276,9 +276,9 @@ 
			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x78b7000 0x600>;

			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_AHB_CLK>,

				 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;

			clock-names = "iface", "core";

			clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,

				 <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			#address-cells = <1>;

			#size-cells = <0>;

			dmas = <&blsp_dma 8>, <&blsp_dma 9>;
@@ -290,9 +290,9 @@ 
			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x78b8000 0x600>;

			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_AHB_CLK>,

				 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;

			clock-names = "iface", "core";

			clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,

				 <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			#address-cells = <1>;

			#size-cells = <0>;

			dmas = <&blsp_dma 10>, <&blsp_dma 11>;