Commit 17c15a4c authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
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ARM: dts: qcom: ipq4019: align dmas in SPI/UART with DT schema 



The DT schema expects dma channels in tx-rx order.  No functional
change.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405063451.12011-4-krzysztof.kozlowski@linaro.org
parent 0f375d3a

arch/arm/boot/dts/qcom-ipq4019.dtsi

+12 −12
Original line number Diff line number Diff line
@@ -253,8 +253,8 @@ 
			clock-names = "core", "iface";

			#address-cells = <1>;

			#size-cells = <0>;

			dmas = <&blsp_dma 5>, <&blsp_dma 4>;

			dma-names = "rx", "tx";

			dmas = <&blsp_dma 4>, <&blsp_dma 5>;

			dma-names = "tx", "rx";

			status = "disabled";

		};
@@ -267,8 +267,8 @@ 
			clock-names = "core", "iface";

			#address-cells = <1>;

			#size-cells = <0>;

			dmas = <&blsp_dma 7>, <&blsp_dma 6>;

			dma-names = "rx", "tx";

			dmas = <&blsp_dma 6>, <&blsp_dma 7>;

			dma-names = "tx", "rx";

			status = "disabled";

		};
@@ -281,8 +281,8 @@ 
			clock-names = "iface", "core";

			#address-cells = <1>;

			#size-cells = <0>;

			dmas = <&blsp_dma 9>, <&blsp_dma 8>;

			dma-names = "rx", "tx";

			dmas = <&blsp_dma 8>, <&blsp_dma 9>;

			dma-names = "tx", "rx";

			status = "disabled";

		};
@@ -295,8 +295,8 @@ 
			clock-names = "iface", "core";

			#address-cells = <1>;

			#size-cells = <0>;

			dmas = <&blsp_dma 11>, <&blsp_dma 10>;

			dma-names = "rx", "tx";

			dmas = <&blsp_dma 10>, <&blsp_dma 11>;

			dma-names = "tx", "rx";

			status = "disabled";

		};
@@ -382,8 +382,8 @@ 
			clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,

				<&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			dmas = <&blsp_dma 1>, <&blsp_dma 0>;

			dma-names = "rx", "tx";

			dmas = <&blsp_dma 0>, <&blsp_dma 1>;

			dma-names = "tx", "rx";

		};



		blsp1_uart2: serial@78b0000 {
@@ -394,8 +394,8 @@ 
			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,

				<&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			dmas = <&blsp_dma 3>, <&blsp_dma 2>;

			dma-names = "rx", "tx";

			dmas = <&blsp_dma 2>, <&blsp_dma 3>;

			dma-names = "tx", "rx";

		};



		watchdog: watchdog@b017000 {