Loading drivers/perf/Kconfig +7 −5 Original line number Diff line number Diff line Loading @@ -36,7 +36,7 @@ config ARM_CCI5xx_PMU config ARM_CCN tristate "ARM CCN driver support" depends on ARM || ARM64 depends on ARM || ARM64 || COMPILE_TEST help PMU (perf) driver supporting the ARM CCN (Cache Coherent Network) interconnect. Loading @@ -62,7 +62,8 @@ config ARM_PMU_ACPI config ARM_SMMU_V3_PMU tristate "ARM SMMUv3 Performance Monitors Extension" depends on ARM64 && ACPI depends on (ARM64 && ACPI) || (COMPILE_TEST && 64BIT) depends on GENERIC_MSI_IRQ_DOMAIN help Provides support for the ARM SMMUv3 Performance Monitor Counter Groups (PMCG), which provide monitoring of transactions passing Loading @@ -80,7 +81,7 @@ config ARM_DSU_PMU config FSL_IMX8_DDR_PMU tristate "Freescale i.MX8 DDR perf monitor" depends on ARCH_MXC depends on ARCH_MXC || COMPILE_TEST help Provides support for the DDR performance monitor in i.MX8, which can give information about memory throughput and other related Loading Loading @@ -108,7 +109,8 @@ config QCOM_L3_PMU config THUNDERX2_PMU tristate "Cavium ThunderX2 SoC PMU UNCORE" depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA depends on ARCH_THUNDER2 || COMPILE_TEST depends on NUMA && ACPI default m help Provides support for ThunderX2 UNCORE events. Loading @@ -116,7 +118,7 @@ config THUNDERX2_PMU in the DDR4 Memory Controller (DMC). config XGENE_PMU depends on ARCH_XGENE depends on ARCH_XGENE || (COMPILE_TEST && 64BIT) bool "APM X-Gene SoC PMU" default n help Loading drivers/perf/hisilicon/hisi_uncore_pa_pmu.c +1 −1 Original line number Diff line number Diff line Loading @@ -27,7 +27,7 @@ #define PA_INT_CLEAR 0x1c7c #define PA_EVENT_TYPE0 0x1c80 #define PA_PMU_VERSION 0x1cf0 #define PA_EVENT_CNT0_L 0x1f00 #define PA_EVENT_CNT0_L 0x1d00 #define PA_EVTYPE_MASK 0xff #define PA_NR_COUNTERS 0x8 Loading drivers/perf/thunderx2_pmu.c +1 −1 Original line number Diff line number Diff line Loading @@ -487,7 +487,7 @@ static void tx2_uncore_event_update(struct perf_event *event) new = reg_readl(hwc->event_base); prev = local64_xchg(&hwc->prev_count, new); /* handles rollover of 32 bit counter */ delta = (u32)(((1UL << 32) - prev) + new); delta = (u32)(((1ULL << 32) - prev) + new); } /* DMC event data_transfers granularity is 16 Bytes, convert it to 64 */ Loading Loading
drivers/perf/Kconfig +7 −5 Original line number Diff line number Diff line Loading @@ -36,7 +36,7 @@ config ARM_CCI5xx_PMU config ARM_CCN tristate "ARM CCN driver support" depends on ARM || ARM64 depends on ARM || ARM64 || COMPILE_TEST help PMU (perf) driver supporting the ARM CCN (Cache Coherent Network) interconnect. Loading @@ -62,7 +62,8 @@ config ARM_PMU_ACPI config ARM_SMMU_V3_PMU tristate "ARM SMMUv3 Performance Monitors Extension" depends on ARM64 && ACPI depends on (ARM64 && ACPI) || (COMPILE_TEST && 64BIT) depends on GENERIC_MSI_IRQ_DOMAIN help Provides support for the ARM SMMUv3 Performance Monitor Counter Groups (PMCG), which provide monitoring of transactions passing Loading @@ -80,7 +81,7 @@ config ARM_DSU_PMU config FSL_IMX8_DDR_PMU tristate "Freescale i.MX8 DDR perf monitor" depends on ARCH_MXC depends on ARCH_MXC || COMPILE_TEST help Provides support for the DDR performance monitor in i.MX8, which can give information about memory throughput and other related Loading Loading @@ -108,7 +109,8 @@ config QCOM_L3_PMU config THUNDERX2_PMU tristate "Cavium ThunderX2 SoC PMU UNCORE" depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA depends on ARCH_THUNDER2 || COMPILE_TEST depends on NUMA && ACPI default m help Provides support for ThunderX2 UNCORE events. Loading @@ -116,7 +118,7 @@ config THUNDERX2_PMU in the DDR4 Memory Controller (DMC). config XGENE_PMU depends on ARCH_XGENE depends on ARCH_XGENE || (COMPILE_TEST && 64BIT) bool "APM X-Gene SoC PMU" default n help Loading
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c +1 −1 Original line number Diff line number Diff line Loading @@ -27,7 +27,7 @@ #define PA_INT_CLEAR 0x1c7c #define PA_EVENT_TYPE0 0x1c80 #define PA_PMU_VERSION 0x1cf0 #define PA_EVENT_CNT0_L 0x1f00 #define PA_EVENT_CNT0_L 0x1d00 #define PA_EVTYPE_MASK 0xff #define PA_NR_COUNTERS 0x8 Loading
drivers/perf/thunderx2_pmu.c +1 −1 Original line number Diff line number Diff line Loading @@ -487,7 +487,7 @@ static void tx2_uncore_event_update(struct perf_event *event) new = reg_readl(hwc->event_base); prev = local64_xchg(&hwc->prev_count, new); /* handles rollover of 32 bit counter */ delta = (u32)(((1UL << 32) - prev) + new); delta = (u32)(((1ULL << 32) - prev) + new); } /* DMC event data_transfers granularity is 16 Bytes, convert it to 64 */ Loading