Unverified Commit bb4544c6 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v5.15-rockchip-dts32-1' of... 

Merge tag 'v5.15-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

io-domains for rk3188 and rv1108, sfc (flash) support fpr rv1108
and some cleanups.

* tag 'v5.15-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Add SFC to RV1108
  ARM: dts: rockchip: add io-domains nodes to rv1108.dtsi
  ARM: dts: rockchip: add io-domains node to rk3188.dtsi
  ARM: dts: rockchip: remove interrupt-names from iommu nodes
  ARM: dts: rockchip: rename timer compatible strings for rk3066a
  ARM: dts: rockchip: add space after &grf on rk3188
  ARM: dts: rockchip: rename pcfg_* nodenames for rk3066/rk3188

Link: https://lore.kernel.org/r/4142796.VLH7GnMWUR@phil


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c4d39282 9d508827

arch/arm/boot/dts/rk3066a.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -218,7 +218,7 @@ 
	};



	timer2: timer@2000e000 {

		compatible = "snps,dw-apb-timer-osc";

		compatible = "snps,dw-apb-timer";

		reg = <0x2000e000 0x100>;

		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>;
@@ -239,7 +239,7 @@ 
	};



	timer0: timer@20038000 {

		compatible = "snps,dw-apb-timer-osc";

		compatible = "snps,dw-apb-timer";

		reg = <0x20038000 0x100>;

		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>;
@@ -247,7 +247,7 @@ 
	};



	timer1: timer@2003a000 {

		compatible = "snps,dw-apb-timer-osc";

		compatible = "snps,dw-apb-timer";

		reg = <0x2003a000 0x100>;

		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_TIMER1>, <&cru PCLK_TIMER1>;
@@ -351,11 +351,11 @@ 
			#interrupt-cells = <2>;

		};



		pcfg_pull_default: pcfg_pull_default {

		pcfg_pull_default: pcfg-pull-default {

			bias-pull-pin-default;

		};



		pcfg_pull_none: pcfg_pull_none {

		pcfg_pull_none: pcfg-pull-none {

			bias-disable;

		};

arch/arm/boot/dts/rk3188.dtsi

+9 −4
Original line number Diff line number Diff line
@@ -275,15 +275,15 @@ 
			#interrupt-cells = <2>;

		};



		pcfg_pull_up: pcfg_pull_up {

		pcfg_pull_up: pcfg-pull-up {

			bias-pull-up;

		};



		pcfg_pull_down: pcfg_pull_down {

		pcfg_pull_down: pcfg-pull-down {

			bias-pull-down;

		};



		pcfg_pull_none: pcfg_pull_none {

		pcfg_pull_none: pcfg-pull-none {

			bias-disable;

		};
@@ -641,6 +641,11 @@ 
&grf {

	compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd";



	io_domains: io-domains {

		compatible = "rockchip,rk3188-io-voltage-domain";

		status = "disabled";

	};



	usbphy: usbphy {

		compatible = "rockchip,rk3188-usb-phy",

			     "rockchip,rk3288-usb-phy";

arch/arm/boot/dts/rk3288.dtsi

+0 −6
Original line number Diff line number Diff line
@@ -987,7 +987,6 @@ 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff900800 0x0 0x40>;

		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "iep_mmu";

		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;

		clock-names = "aclk", "iface";

		#iommu-cells = <0>;
@@ -998,7 +997,6 @@ 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;

		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "isp_mmu";

		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;

		clock-names = "aclk", "iface";

		#iommu-cells = <0>;
@@ -1059,7 +1057,6 @@ 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff930300 0x0 0x100>;

		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vopb_mmu";

		clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;

		clock-names = "aclk", "iface";

		power-domains = <&power RK3288_PD_VIO>;
@@ -1109,7 +1106,6 @@ 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff940300 0x0 0x100>;

		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vopl_mmu";

		clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;

		clock-names = "aclk", "iface";

		power-domains = <&power RK3288_PD_VIO>;
@@ -1252,7 +1248,6 @@ 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff9a0800 0x0 0x100>;

		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vpu_mmu";

		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;

		clock-names = "aclk", "iface";

		#iommu-cells = <0>;
@@ -1263,7 +1258,6 @@ 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;

		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "hevc_mmu";

		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;

		clock-names = "aclk", "iface";

		#iommu-cells = <0>;

arch/arm/boot/dts/rv1108.dtsi

+48 −1
Original line number Diff line number Diff line
@@ -265,6 +265,11 @@ 
		#address-cells = <1>;

		#size-cells = <1>;



		io_domains: io-domains {

			compatible = "rockchip,rv1108-io-voltage-domain";

			status = "disabled";

		};



		u2phy: usb2phy@100 {

			compatible = "rockchip,rv1108-usb2phy";

			reg = <0x100 0x0c>;
@@ -434,8 +439,13 @@ 
	};



	pmugrf: syscon@20060000 {

		compatible = "rockchip,rv1108-pmugrf", "syscon";

		compatible = "rockchip,rv1108-pmugrf", "syscon", "simple-mfd";

		reg = <0x20060000 0x1000>;



		pmu_io_domains: io-domains {

			compatible = "rockchip,rv1108-pmu-io-voltage-domain";

			status = "disabled";

		};

	};



	usbgrf: syscon@202a0000 {
@@ -536,6 +546,17 @@ 
		status = "disabled";

	};



	sfc: spi@301c0000 {

		compatible = "rockchip,sfc";

		reg = <0x301c0000 0x4000>;

		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;

		clock-names = "clk_sfc", "hclk_sfc";

		pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;

		pinctrl-names = "default";

		status = "disabled";

	};



	gmac: eth@30200000 {

		compatible = "rockchip,rv1108-gmac";

		reg = <0x30200000 0x10000>;
@@ -704,6 +725,32 @@ 
			};

		};



		sfc {

			sfc_bus4: sfc-bus4 {

				rockchip,pins =

					<2 RK_PA0 3 &pcfg_pull_none>,

					<2 RK_PA1 3 &pcfg_pull_none>,

					<2 RK_PA2 3 &pcfg_pull_none>,

					<2 RK_PA3 3 &pcfg_pull_none>;

			};



			sfc_bus2: sfc-bus2 {

				rockchip,pins =

					<2 RK_PA0 3 &pcfg_pull_none>,

					<2 RK_PA1 3 &pcfg_pull_none>;

			};



			sfc_cs0: sfc-cs0 {

				rockchip,pins =

					<2 RK_PB4 3 &pcfg_pull_none>;

			};



			sfc_clk: sfc-clk {

				rockchip,pins =

					<2 RK_PB7 2 &pcfg_pull_none>;

			};

		};



		gmac {

			rmii_pins: rmii-pins {

				rockchip,pins =	<1 RK_PC5 2 &pcfg_pull_none>,