Commit b9d699e2 authored by Marc Zyngier's avatar Marc Zyngier Committed by Paolo Bonzini
Browse files

KVM: arm64: Rename __vgic_v3_get_ich_vtr_el2() to __vgic_v3_get_gic_config() 



As we are about to report a bit more information to the rest of
the kernel, rename __vgic_v3_get_ich_vtr_el2() to the more
explicit __vgic_v3_get_gic_config().

No functional change.

Tested-by: default avatarShameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Message-Id: <20210305185254.3730990-7-maz@kernel.org>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent f27647b5

arch/arm64/include/asm/kvm_asm.h

+2 −2
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ 
#define __KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_local_vmid	5

#define __KVM_HOST_SMCCC_FUNC___kvm_timer_set_cntvoff		6

#define __KVM_HOST_SMCCC_FUNC___kvm_enable_ssbs			7

#define __KVM_HOST_SMCCC_FUNC___vgic_v3_get_ich_vtr_el2		8

#define __KVM_HOST_SMCCC_FUNC___vgic_v3_get_gic_config		8

#define __KVM_HOST_SMCCC_FUNC___vgic_v3_read_vmcr		9

#define __KVM_HOST_SMCCC_FUNC___vgic_v3_write_vmcr		10

#define __KVM_HOST_SMCCC_FUNC___vgic_v3_init_lrs		11
@@ -192,7 +192,7 @@ extern void __kvm_timer_set_cntvoff(u64 cntvoff); 


extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);



extern u64 __vgic_v3_get_ich_vtr_el2(void);

extern u64 __vgic_v3_get_gic_config(void);

extern u64 __vgic_v3_read_vmcr(void);

extern void __vgic_v3_write_vmcr(u32 vmcr);

extern void __vgic_v3_init_lrs(void);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

+3 −3
Original line number Diff line number Diff line
@@ -67,9 +67,9 @@ static void handle___kvm_enable_ssbs(struct kvm_cpu_context *host_ctxt) 
	write_sysreg_el2(tmp, SYS_SCTLR);

}



static void handle___vgic_v3_get_ich_vtr_el2(struct kvm_cpu_context *host_ctxt)

static void handle___vgic_v3_get_gic_config(struct kvm_cpu_context *host_ctxt)

{

	cpu_reg(host_ctxt, 1) = __vgic_v3_get_ich_vtr_el2();

	cpu_reg(host_ctxt, 1) = __vgic_v3_get_gic_config();

}



static void handle___vgic_v3_read_vmcr(struct kvm_cpu_context *host_ctxt)
@@ -118,7 +118,7 @@ static const hcall_t host_hcall[] = { 
	HANDLE_FUNC(__kvm_tlb_flush_local_vmid),

	HANDLE_FUNC(__kvm_timer_set_cntvoff),

	HANDLE_FUNC(__kvm_enable_ssbs),

	HANDLE_FUNC(__vgic_v3_get_ich_vtr_el2),

	HANDLE_FUNC(__vgic_v3_get_gic_config),

	HANDLE_FUNC(__vgic_v3_read_vmcr),

	HANDLE_FUNC(__vgic_v3_write_vmcr),

	HANDLE_FUNC(__vgic_v3_init_lrs),

arch/arm64/kvm/hyp/vgic-v3-sr.c

+6 −1
Original line number Diff line number Diff line
@@ -405,7 +405,12 @@ void __vgic_v3_init_lrs(void) 
		__gic_v3_set_lr(0, i);

}



u64 __vgic_v3_get_ich_vtr_el2(void)

/*

 * Return the GIC CPU configuration:

 * - [31:0]  ICH_VTR_EL2

 * - [63:32] RES0

 */

u64 __vgic_v3_get_gic_config(void)

{

	return read_gicreg(ICH_VTR_EL2);

}

arch/arm64/kvm/vgic/vgic-v3.c

+3 −1
Original line number Diff line number Diff line
@@ -574,9 +574,11 @@ early_param("kvm-arm.vgic_v4_enable", early_gicv4_enable); 
 */

int vgic_v3_probe(const struct gic_kvm_info *info)

{

	u32 ich_vtr_el2 = kvm_call_hyp_ret(__vgic_v3_get_ich_vtr_el2);

	u64 ich_vtr_el2 = kvm_call_hyp_ret(__vgic_v3_get_gic_config);

	int ret;



	ich_vtr_el2 = (u32)ich_vtr_el2;



	/*

	 * The ListRegs field is 5 bits, but there is an architectural

	 * maximum of 16 list registers. Just ignore bit 4...