EDAC: Add RDDR5 and LRDDR5 memory types

mainline inclusion
from mainline-v5.17-rc1
commit f9571124
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I7DX6V
CVE: NA

Reference: https://git.kernel.org/torvalds/c/f95711242390d759f69fd67ad46b31491fe904d6



---------------------------

commit f9571124 upstream.

Include Registered-DDR5 and Load-Reduced DDR5 in the list of memory
types.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211208174356.1997855-2-yazen.ghannam@amd.com


[fix conflict during backport]
Signed-off-by: Pu Wen <puwen@hygon.cn>