Commit b53891da authored by Leo Chen's avatar Leo Chen Committed by openeuler-sync-bot
Browse files

drm/amd/display: Exit idle optimizations before attempt to access PHY 

stable inclusion
from stable-v5.10.205
commit 357badc01add6e98dd69c9831843da9cc3e905e9
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8AS5P
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.205&id=357badc01add6e98dd69c9831843da9cc3e905e9



-------------------------

[ Upstream commit de612738 ]

[Why & How]
DMUB may hang when powering down pixel clocks due to no dprefclk.

It is fixed by exiting idle optimization before the attempt to access PHY.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarLeo Chen <sancchen@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarBaogen Shang <baogen.shang@windriver.com>
(cherry picked from commit 7aa772b6)
parent 31ca0b66

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+3 −0
Original line number Diff line number Diff line
@@ -1682,10 +1682,13 @@ void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context) 
			hws->funcs.edp_backlight_control(edp_link_with_sink, false);

		}

		/*resume from S3, no vbios posting, no need to power down again*/

		clk_mgr_exit_optimized_pwr_state(dc, dc->clk_mgr);



		power_down_all_hw_blocks(dc);

		disable_vga_and_power_gate_all_controllers(dc);

		if (edp_link_with_sink && !keep_edp_vdd_on)

			dc->hwss.edp_power_control(edp_link_with_sink, false);

		clk_mgr_optimize_pwr_state(dc, dc->clk_mgr);

	}

	bios_set_scratch_acc_mode_change(dc->ctx->dc_bios);

}