Commit abdedd4b authored by Kunkun Jiang's avatar Kunkun Jiang Committed by Zheng Zengkai
Browse files

Revert "iommu/arm-smmu-v3: Using HTTU with SMMU STE and stage 2 TTD" 

virt inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I61SPO


CVE: NA

--------------------------------

This reverts commit 97e11307.

Signed-off-by: default avatarKunkun Jiang <jiangkunkun@huawei.com>
Reviewed-by: default avatarKeqian Zhu <zhukeqian1@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent f120cfc2

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

+0 −5
Original line number Diff line number Diff line
@@ -1610,11 +1610,6 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, 
			 STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2AA64 |

			 STRTAB_STE_2_S2R);



		if (smmu->features & ARM_SMMU_FEAT_HA)

			dst[2] |= cpu_to_le64(STRTAB_STE_2_S2HA);

		if (smmu->features & ARM_SMMU_FEAT_HD)

			dst[2] |= cpu_to_le64(STRTAB_STE_2_S2HD);



		dst[3] = cpu_to_le64(vttbr);



		val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S2_TRANS);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h

+0 −2
Original line number Diff line number Diff line
@@ -294,8 +294,6 @@ 
#define STRTAB_STE_2_S2AA64		(1UL << 51)

#define STRTAB_STE_2_S2ENDI		(1UL << 52)

#define STRTAB_STE_2_S2PTW		(1UL << 54)

#define STRTAB_STE_2_S2HD		(1UL << 55)

#define STRTAB_STE_2_S2HA		(1UL << 56)

#define STRTAB_STE_2_S2R		(1UL << 58)



#define STRTAB_STE_3_S2TTB_MASK		GENMASK_ULL(51, 4)

drivers/iommu/io-pgtable-arm.c

+1 −5
Original line number Diff line number Diff line
@@ -401,12 +401,8 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, 
		pte = ARM_LPAE_PTE_HAP_FAULT;

		if (prot & IOMMU_READ)

			pte |= ARM_LPAE_PTE_HAP_READ;

		if (prot & IOMMU_WRITE) {

		if (prot & IOMMU_WRITE)

			pte |= ARM_LPAE_PTE_HAP_WRITE;

			if (data->iop.fmt == ARM_64_LPAE_S2 &&

			    cfg->quirks & IO_PGTABLE_QUIRK_ARM_HD)

				pte |= ARM_LPAE_PTE_DBM;

		}

	}



	/*