Commit ab498402 authored by Matt Roper's avatar Matt Roper
Browse files

drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDV 



DG2 supports compute DSS and has the same maximum number of DSS and EU
as XeHP SDV.

Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarCaz Yokoyama <caz.yokoyama@intel.com>
Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210729170008.2836648-12-matthew.d.roper@intel.com
parent eb962fae

drivers/gpu/drm/i915/gt/intel_sseu.c

+1 −1
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@ static void gen12_sseu_info_init(struct intel_gt *gt) 
	 * across the entire device. Then calculate out the DSS for each

	 * workload type within that software slice.

	 */

	if (IS_XEHPSDV(gt->i915))

	if (IS_DG2(gt->i915) || IS_XEHPSDV(gt->i915))

		intel_sseu_set_info(sseu, 1, 32, 16);

	else

		intel_sseu_set_info(sseu, 1, 6, 16);