Commit a9efa75d authored by Jialin Zhang's avatar Jialin Zhang
Browse files

x86/cpufeatures: Fix abi breakage caused by NCAPINTS in cpufeature header file. 

hulk inclusion
category: bugfix
bugzilla: https://gitee.com/src-openeuler/kernel/issues/I7RQ67



--------------------------------

Fix abi breakage according to the previous solution:

commit ac376dd8 ("x86/cpufeatures: Fix abi breakage
caused by NCAPINTS in cpufeature header file.")

Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
Signed-off-by: default avatarYanan Wang <wangyanan55@huawei.com>
Signed-off-by: default avatarKunkun Jiang <jiangkunkun@huawei.com>
parent fbb8a6de

arch/x86/include/asm/cpufeature.h

+2 −5
Original line number Diff line number Diff line
@@ -31,7 +31,6 @@ enum cpuid_leafs 
	CPUID_7_ECX,

	CPUID_8000_0007_EBX,

	CPUID_7_EDX,

	CPUID_8000_0021_EAX,

};



#ifdef CONFIG_X86_FEATURE_NAMES
@@ -90,9 +89,8 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; 
	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) ||	\

	   REQUIRED_MASK_CHECK					  ||	\

	   BUILD_BUG_ON_ZERO(NCAPINTS != 20))

	   BUILD_BUG_ON_ZERO(NCAPINTS != 19))



#define DISABLED_MASK_BIT_SET(feature_bit)				\

	 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  0, feature_bit) ||	\
@@ -114,9 +112,8 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; 
	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) ||	\

	   DISABLED_MASK_CHECK					  ||	\

	   BUILD_BUG_ON_ZERO(NCAPINTS != 20))

	   BUILD_BUG_ON_ZERO(NCAPINTS != 19))



#define cpu_has(c, bit)							\

	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\

arch/x86/include/asm/cpufeatures.h

+6 −5
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 
/*

 * Defines x86 CPU feature bits

 */

#define NCAPINTS			20	   /* N 32-bit words worth of info */

#define NCAPINTS			19	   /* N 32-bit words worth of info */

#define NBUGINTS			2	   /* N 32-bit bug flags */



/*
@@ -409,6 +409,11 @@ 
#define X86_FEATURE_SUCCOR		(17*32+ 1) /* Uncorrectable error containment and recovery */

#define X86_FEATURE_SMCA		(17*32+ 3) /* Scalable MCA */



/* AMD-defined SRSO vulnerability features, CPUID level 0x80000021 (EAX), word 20 */

#define X86_FEATURE_SBPB		(17*32+24)

#define X86_FEATURE_IBPB_BRTYPE		(17*32+25)

#define X86_FEATURE_SRSO_NO		(17*32+26)



/* AMD-defined memory encryption features, CPUID level 0x8000001f (EAX), word 19 */

#define X86_FEATURE_SME			(17*32+ 27) /* AMD Secure Memory Encryption */

#define X86_FEATURE_SEV			(17*32+ 28) /* AMD Secure Encrypted Virtualization */
@@ -440,10 +445,6 @@ 
#define X86_FEATURE_SPEC_CTRL_SSBD	(18*32+31) /* "" Speculative Store Bypass Disable */





#define X86_FEATURE_SBPB		(19*32+27) /* "" Selective Branch Prediction Barrier */

#define X86_FEATURE_IBPB_BRTYPE		(19*32+28) /* "" MSR_PRED_CMD[IBPB] flushes all branch type predictions */

#define X86_FEATURE_SRSO_NO		(19*32+29) /* "" CPU is not affected by SRSO */



/*

 * BUG word(s)

 */

arch/x86/include/asm/disabled-features.h

+1 −2
Original line number Diff line number Diff line
@@ -110,7 +110,6 @@ 
			 DISABLE_ENQCMD)

#define DISABLED_MASK17	0

#define DISABLED_MASK18	0

#define DISABLED_MASK19	0

#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 20)

#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)



#endif /* _ASM_X86_DISABLED_FEATURES_H */

arch/x86/include/asm/required-features.h

+1 −2
Original line number Diff line number Diff line
@@ -101,7 +101,6 @@ 
#define REQUIRED_MASK16	0

#define REQUIRED_MASK17	0

#define REQUIRED_MASK18	0

#define REQUIRED_MASK19	0

#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 20)

#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)



#endif /* _ASM_X86_REQUIRED_FEATURES_H */

arch/x86/kernel/cpu/common.c

+0 −3
Original line number Diff line number Diff line
@@ -963,9 +963,6 @@ void get_cpu_cap(struct cpuinfo_x86 *c) 
	if (c->extended_cpuid_level >= 0x8000000a)

		c->x86_capability[CPUID_8000_000A_EDX] = cpuid_edx(0x8000000a);



	if (c->extended_cpuid_level >= 0x80000021)

		c->x86_capability[CPUID_8000_0021_EAX] = cpuid_eax(0x80000021);



	init_scattered_cpuid_features(c);

	init_speculation_control(c);