Commit a96ab11b authored by Venkata Prasad Potturu's avatar Venkata Prasad Potturu Committed by ZhangPeng
Browse files

ASoC: sof: amd: fix for firmware reload failure in Vangogh platform 

stable inclusion
from stable-v6.6.44
commit 6443a4028539c7c379f70edb1acba5313a647567
bugzilla: https://gitee.com/openeuler/kernel/issues/IAHMJO

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=6443a4028539c7c379f70edb1acba5313a647567



--------------------------------

[ Upstream commit f2038c12e8133bf4c6bd4d1127a23310d55d9e21 ]

Setting ACP ACLK as clock source when ACP enters D0 state causing
firmware load failure, as per design clock source should be internal
clock.

Remove acp_clkmux_sel field so that ACP will use internal clock
source when ACP enters into D0 state.

Fixes: d0dab6b7 ("ASoC: SOF: amd: Add sof support for vangogh platform")

Signed-off-by: default avatarVenkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://patch.msgid.link/20240718062004.581685-1-venkataprasad.potturu@amd.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarZhangPeng <zhangpeng362@huawei.com>
parent 07855155

sound/soc/sof/amd/pci-vangogh.c

+0 −1
Original line number Diff line number Diff line
@@ -34,7 +34,6 @@ static const struct sof_amd_acp_desc vangogh_chip_info = { 
	.dsp_intr_base	= ACP5X_DSP_SW_INTR_BASE,

	.sram_pte_offset = ACP5X_SRAM_PTE_OFFSET,

	.hw_semaphore_offset = ACP5X_AXI2DAGB_SEM_0,

	.acp_clkmux_sel = ACP5X_CLKMUX_SEL,

	.probe_reg_offset = ACP5X_FUTURE_REG_ACLK_0,

};