Unverified Commit d0dab6b7 authored by Venkata Prasad Potturu's avatar Venkata Prasad Potturu Committed by Mark Brown
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ASoC: SOF: amd: Add sof support for vangogh platform



Add pci driver and platform driver to enable SOF support
on ACP5x architecture based Vangogh platform.

Signed-off-by: default avatarVenkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://lore.kernel.org/r/20230809123534.287707-1-venkataprasad.potturu@amd.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 919a4a94
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+11 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@
# This file is provided under a dual BSD/GPLv2 license. When using or
# redistributing this file, you may do so under either license.
#
# Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
# Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.

config SND_SOC_SOF_AMD_TOPLEVEL
	tristate "SOF support for AMD audio DSPs"
@@ -34,6 +34,16 @@ config SND_SOC_SOF_AMD_RENOIR
	help
	  Select this option for SOF support on AMD Renoir platform

config SND_SOC_SOF_AMD_VANGOGH
	tristate "SOF support for VANGOGH"
	depends on SND_SOC_SOF_PCI
	select SND_SOC_SOF_AMD_COMMON
	help
	  Select this option for SOF support
	  on AMD Vangogh platform.
	  Say Y if you want to enable SOF on Vangogh.
	  If unsure select "N".

config SND_SOC_SOF_AMD_REMBRANDT
	tristate "SOF support for REMBRANDT"
	depends on SND_SOC_SOF_PCI
+3 −1
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@@ -2,13 +2,15 @@
# This file is provided under a dual BSD/GPLv2 license. When using or
# redistributing this file, you may do so under either license.
#
# Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
# Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.

snd-sof-amd-acp-objs := acp.o acp-loader.o acp-ipc.o acp-pcm.o acp-stream.o acp-trace.o acp-common.o
snd-sof-amd-acp-$(CONFIG_SND_SOC_SOF_ACP_PROBES) = acp-probes.o
snd-sof-amd-renoir-objs := pci-rn.o renoir.o
snd-sof-amd-rembrandt-objs := pci-rmb.o rembrandt.o
snd-sof-amd-vangogh-objs := pci-vangogh.o vangogh.o

obj-$(CONFIG_SND_SOC_SOF_AMD_COMMON) += snd-sof-amd-acp.o
obj-$(CONFIG_SND_SOC_SOF_AMD_RENOIR) +=snd-sof-amd-renoir.o
obj-$(CONFIG_SND_SOC_SOF_AMD_REMBRANDT) +=snd-sof-amd-rembrandt.o
obj-$(CONFIG_SND_SOC_SOF_AMD_VANGOGH) +=snd-sof-amd-vangogh.o
+7 −1
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@
 * This file is provided under a dual BSD/GPLv2 license. When using or
 * redistributing this file, you may do so under either license.
 *
 * Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
 * Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.
 *
 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
 */
@@ -49,27 +49,33 @@
#define ACP_CONTROL				0x1004

#define ACP3X_I2S_PIN_CONFIG			0x1400
#define ACP5X_I2S_PIN_CONFIG			0x1400
#define ACP6X_I2S_PIN_CONFIG			0x1440

/* Registers offsets from ACP_PGFSM block */
#define ACP3X_PGFSM_BASE			0x141C
#define ACP5X_PGFSM_BASE			0x1424
#define ACP6X_PGFSM_BASE                        0x1024
#define PGFSM_CONTROL_OFFSET			0x0
#define PGFSM_STATUS_OFFSET			0x4
#define ACP3X_CLKMUX_SEL			0x1424
#define ACP5X_CLKMUX_SEL			0x142C
#define ACP6X_CLKMUX_SEL			0x102C

/* Registers from ACP_INTR block */
#define ACP3X_EXT_INTR_STAT			0x1808
#define ACP5X_EXT_INTR_STAT			0x1808
#define ACP6X_EXT_INTR_STAT                     0x1A0C

#define ACP3X_DSP_SW_INTR_BASE			0x1814
#define ACP5X_DSP_SW_INTR_BASE			0x1814
#define ACP6X_DSP_SW_INTR_BASE                  0x1808
#define DSP_SW_INTR_CNTL_OFFSET			0x0
#define DSP_SW_INTR_STAT_OFFSET			0x4
#define DSP_SW_INTR_TRIG_OFFSET			0x8
#define ACP_ERROR_STATUS			0x18C4
#define ACP3X_AXI2DAGB_SEM_0			0x1880
#define ACP5X_AXI2DAGB_SEM_0			0x1884
#define ACP6X_AXI2DAGB_SEM_0			0x1874

/* Registers from ACP_SHA block */
+8 −1
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@
 * This file is provided under a dual BSD/GPLv2 license. When using or
 * redistributing this file, you may do so under either license.
 *
 * Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
 * Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.
 *
 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
 */
@@ -32,6 +32,7 @@

#define ACP_DSP_INTR_EN_MASK			0x00000001
#define ACP3X_SRAM_PTE_OFFSET			0x02050000
#define ACP5X_SRAM_PTE_OFFSET			0x02050000
#define ACP6X_SRAM_PTE_OFFSET			0x03800000
#define PAGE_SIZE_4K_ENABLE			0x2
#define ACP_PAGE_SIZE				0x1000
@@ -56,9 +57,11 @@
#define ACP_DSP_TO_HOST_IRQ			0x04

#define ACP_RN_PCI_ID				0x01
#define ACP_VANGOGH_PCI_ID			0x50
#define ACP_RMB_PCI_ID				0x6F

#define HOST_BRIDGE_CZN				0x1630
#define HOST_BRIDGE_VGH				0x1645
#define HOST_BRIDGE_RMB				0x14B5
#define ACP_SHA_STAT				0x8000
#define ACP_PSP_TIMEOUT_US			1000000
@@ -163,6 +166,7 @@ struct acp_dsp_stream {

struct sof_amd_acp_desc {
	unsigned int rev;
	const char *name;
	unsigned int host_bridge_id;
	u32 pgfsm_base;
	u32 ext_intr_stat;
@@ -253,6 +257,8 @@ extern struct snd_sof_dsp_ops sof_acp_common_ops;

extern struct snd_sof_dsp_ops sof_renoir_ops;
int sof_renoir_ops_init(struct snd_sof_dev *sdev);
extern struct snd_sof_dsp_ops sof_vangogh_ops;
int sof_vangogh_ops_init(struct snd_sof_dev *sdev);
extern struct snd_sof_dsp_ops sof_rembrandt_ops;
int sof_rembrandt_ops_init(struct snd_sof_dev *sdev);

@@ -282,4 +288,5 @@ static inline const struct sof_amd_acp_desc *get_chip_info(struct snd_sof_pdata
int acp_probes_register(struct snd_sof_dev *sdev);
void acp_probes_unregister(struct snd_sof_dev *sdev);

extern struct snd_soc_acpi_mach snd_soc_acpi_amd_vangogh_sof_machines[];
#endif
+105 −0
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
//
// This file is provided under a dual BSD/GPLv2 license. When using or
// redistributing this file, you may do so under either license.
//
// Copyright(c) 2023 Advanced Micro Devices, Inc. All rights reserved.
//
// Authors: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>

/*.
 * PCI interface for Vangogh ACP device
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <sound/sof.h>
#include <sound/soc-acpi.h>

#include "../ops.h"
#include "../sof-pci-dev.h"
#include "../../amd/mach-config.h"
#include "acp.h"
#include "acp-dsp-offset.h"

#define ACP5X_FUTURE_REG_ACLK_0 0x1864

static const struct sof_amd_acp_desc vangogh_chip_info = {
	.rev		= 5,
	.name		= "vangogh",
	.host_bridge_id = HOST_BRIDGE_VGH,
	.pgfsm_base	= ACP5X_PGFSM_BASE,
	.ext_intr_stat	= ACP5X_EXT_INTR_STAT,
	.dsp_intr_base	= ACP5X_DSP_SW_INTR_BASE,
	.sram_pte_offset = ACP5X_SRAM_PTE_OFFSET,
	.hw_semaphore_offset = ACP5X_AXI2DAGB_SEM_0,
	.acp_clkmux_sel = ACP5X_CLKMUX_SEL,
	.probe_reg_offset = ACP5X_FUTURE_REG_ACLK_0,
};

static const struct sof_dev_desc vangogh_desc = {
	.machines		= snd_soc_acpi_amd_vangogh_sof_machines,
	.resindex_lpe_base	= 0,
	.resindex_pcicfg_base	= -1,
	.resindex_imr_base	= -1,
	.irqindex_host_ipc	= -1,
	.chip_info		= &vangogh_chip_info,
	.ipc_supported_mask     = BIT(SOF_IPC),
	.ipc_default            = SOF_IPC,
	.default_fw_path	= {
		[SOF_IPC] = "amd/sof",
	},
	.default_tplg_path	= {
		[SOF_IPC] = "amd/sof-tplg",
	},
	.default_fw_filename	= {
		[SOF_IPC] = "sof-vangogh.ri",
	},
	.nocodec_tplg_filename	= "sof-acp.tplg",
	.ops			= &sof_vangogh_ops,
	.ops_init		= sof_vangogh_ops_init,
};

static int acp_pci_vgh_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
{
	unsigned int flag;

	if (pci->revision != ACP_VANGOGH_PCI_ID)
		return -ENODEV;

	flag = snd_amd_acp_find_config(pci);
	if (flag != FLAG_AMD_SOF && flag != FLAG_AMD_SOF_ONLY_DMIC)
		return -ENODEV;

	return sof_pci_probe(pci, pci_id);
};

static void acp_pci_vgh_remove(struct pci_dev *pci)
{
	sof_pci_remove(pci);
}

/* PCI IDs */
static const struct pci_device_id vgh_pci_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, ACP_PCI_DEV_ID),
	.driver_data = (unsigned long)&vangogh_desc},
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, vgh_pci_ids);

/* pci_driver definition */
static struct pci_driver snd_sof_pci_amd_vgh_driver = {
	.name = KBUILD_MODNAME,
	.id_table = vgh_pci_ids,
	.probe = acp_pci_vgh_probe,
	.remove = acp_pci_vgh_remove,
	.driver = {
		.pm = &sof_pci_pm,
	},
};
module_pci_driver(snd_sof_pci_amd_vgh_driver);

MODULE_LICENSE("Dual BSD/GPL");
MODULE_IMPORT_NS(SND_SOC_SOF_AMD_COMMON);
MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
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