Commit a8352a51 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: r9a07g043: Fillup the WDT{0,2} stub nodes 



Fillup the WDT{0,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-7-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent e42faad1

arch/arm64/boot/dts/renesas/r9a07g043.dtsi

+22 −2
Original line number Diff line number Diff line
@@ -694,13 +694,33 @@ 
		};



		wdt0: watchdog@12800800 {

			compatible = "renesas,r9a07g043-wdt",

				     "renesas,rzg2l-wdt";

			reg = <0 0x12800800 0 0x400>;

			/* place holder */

			clocks = <&cpg CPG_MOD R9A07G043_WDT0_PCLK>,

				 <&cpg CPG_MOD R9A07G043_WDT0_CLK>;

			clock-names = "pclk", "oscclk";

			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "wdt", "perrout";

			resets = <&cpg R9A07G043_WDT0_PRESETN>;

			power-domains = <&cpg>;

			status = "disabled";

		};



		wdt2: watchdog@12800400 {

			compatible = "renesas,r9a07g043-wdt",

				     "renesas,rzg2l-wdt";

			reg = <0 0x12800400 0 0x400>;

			/* place holder */

			clocks = <&cpg CPG_MOD R9A07G043_WDT2_PCLK>,

				 <&cpg CPG_MOD R9A07G043_WDT2_CLK>;

			clock-names = "pclk", "oscclk";

			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "wdt", "perrout";

			resets = <&cpg R9A07G043_WDT2_PRESETN>;

			power-domains = <&cpg>;

			status = "disabled";

		};



		ostm0: timer@12801000 {