Commit a81bfdf8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2021-02-12' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "Regular fixes for final, there is a ttm regression fix, dp-mst fix,
  one amdgpu revert, two i915 fixes, and some misc fixes for sun4i,
  xlnx, and vc4.

  All pretty quiet and don't think we have any known outstanding
  regressions.

  ttm:
   - page pool regression fix.

  dp_mst:
   - don't report un-attached ports as connected

  amdgpu:
   - blank screen fix

  i915:
   - ensure Type-C FIA is powered when initializing
   - fix overlay frontbuffer tracking

  sun4i:
   - tcon1 sync polarity fix
   - always set HDMI clock rate
   - fix H6 HDMI PHY config
   - fix H6 max frequency

  vc4:
   - fix buffer overflow

  xlnx:
   - fix memory leak"

* tag 'drm-fixes-2021-02-12' of git://anongit.freedesktop.org/drm/drm:
  drm/ttm: make sure pool pages are cleared
  drm/sun4i: dw-hdmi: Fix max. frequency for H6
  drm/sun4i: Fix H6 HDMI PHY configuration
  drm/sun4i: dw-hdmi: always set clock rate
  drm/sun4i: tcon: set sync polarity for tcon1 channel
  drm/i915: Fix overlay frontbuffer tracking
  Revert "drm/amd/display: Update NV1x SR latency values"
  drm/i915/tgl+: Make sure TypeC FIA is powered up when initializing it
  drm/dp_mst: Don't report ports connected if nothing is attached to them
  drm/xlnx: fix kmemleak by sending vblank_event in atomic_disable
  drm/vc4: hvs: Fix buffer overflow with the dlist handling
parents e77a6817 551c8185

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

+2 −2
Original line number Diff line number Diff line
@@ -297,8 +297,8 @@ static struct _vcs_dpi_soc_bounding_box_st dcn2_0_soc = { 
			},

		},

	.num_states = 5,

	.sr_exit_time_us = 11.6,

	.sr_enter_plus_exit_time_us = 13.9,

	.sr_exit_time_us = 8.6,

	.sr_enter_plus_exit_time_us = 10.9,

	.urgent_latency_us = 4.0,

	.urgent_latency_pixel_data_only_us = 4.0,

	.urgent_latency_pixel_mixed_with_vm_data_us = 4.0,

drivers/gpu/drm/drm_dp_mst_topology.c

+1 −0
Original line number Diff line number Diff line
@@ -4224,6 +4224,7 @@ drm_dp_mst_detect_port(struct drm_connector *connector, 


	switch (port->pdt) {

	case DP_PEER_DEVICE_NONE:

		break;

	case DP_PEER_DEVICE_MST_BRANCHING:

		if (!port->mcs)

			ret = connector_status_connected;

drivers/gpu/drm/i915/display/intel_overlay.c

+8 −9
Original line number Diff line number Diff line
@@ -182,6 +182,7 @@ struct intel_overlay { 
	struct intel_crtc *crtc;

	struct i915_vma *vma;

	struct i915_vma *old_vma;

	struct intel_frontbuffer *frontbuffer;

	bool active;

	bool pfit_active;

	u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
@@ -282,21 +283,19 @@ static void intel_overlay_flip_prepare(struct intel_overlay *overlay, 
				       struct i915_vma *vma)

{

	enum pipe pipe = overlay->crtc->pipe;

	struct intel_frontbuffer *from = NULL, *to = NULL;

	struct intel_frontbuffer *frontbuffer = NULL;



	drm_WARN_ON(&overlay->i915->drm, overlay->old_vma);



	if (overlay->vma)

		from = intel_frontbuffer_get(overlay->vma->obj);

	if (vma)

		to = intel_frontbuffer_get(vma->obj);

		frontbuffer = intel_frontbuffer_get(vma->obj);



	intel_frontbuffer_track(from, to, INTEL_FRONTBUFFER_OVERLAY(pipe));

	intel_frontbuffer_track(overlay->frontbuffer, frontbuffer,

				INTEL_FRONTBUFFER_OVERLAY(pipe));



	if (to)

		intel_frontbuffer_put(to);

	if (from)

		intel_frontbuffer_put(from);

	if (overlay->frontbuffer)

		intel_frontbuffer_put(overlay->frontbuffer);

	overlay->frontbuffer = frontbuffer;



	intel_frontbuffer_flip_prepare(overlay->i915,

				       INTEL_FRONTBUFFER_OVERLAY(pipe));

drivers/gpu/drm/i915/display/intel_tc.c

+37 −30
Original line number Diff line number Diff line
@@ -23,36 +23,6 @@ static const char *tc_port_mode_name(enum tc_port_mode mode) 
	return names[mode];

}



static void

tc_port_load_fia_params(struct drm_i915_private *i915,

			struct intel_digital_port *dig_port)

{

	enum port port = dig_port->base.port;

	enum tc_port tc_port = intel_port_to_tc(i915, port);

	u32 modular_fia;



	if (INTEL_INFO(i915)->display.has_modular_fia) {

		modular_fia = intel_uncore_read(&i915->uncore,

						PORT_TX_DFLEXDPSP(FIA1));

		drm_WARN_ON(&i915->drm, modular_fia == 0xffffffff);

		modular_fia &= MODULAR_FIA_MASK;

	} else {

		modular_fia = 0;

	}



	/*

	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more

	 * than two TC ports, there are multiple instances of Modular FIA.

	 */

	if (modular_fia) {

		dig_port->tc_phy_fia = tc_port / 2;

		dig_port->tc_phy_fia_idx = tc_port % 2;

	} else {

		dig_port->tc_phy_fia = FIA1;

		dig_port->tc_phy_fia_idx = tc_port;

	}

}



static enum intel_display_power_domain

tc_cold_get_power_domain(struct intel_digital_port *dig_port)

{
@@ -646,6 +616,43 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port) 
	mutex_unlock(&dig_port->tc_lock);

}



static bool

tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)

{

	intel_wakeref_t wakeref;

	u32 val;



	if (!INTEL_INFO(i915)->display.has_modular_fia)

		return false;



	wakeref = tc_cold_block(dig_port);

	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));

	tc_cold_unblock(dig_port, wakeref);



	drm_WARN_ON(&i915->drm, val == 0xffffffff);



	return val & MODULAR_FIA_MASK;

}



static void

tc_port_load_fia_params(struct drm_i915_private *i915, struct intel_digital_port *dig_port)

{

	enum port port = dig_port->base.port;

	enum tc_port tc_port = intel_port_to_tc(i915, port);



	/*

	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more

	 * than two TC ports, there are multiple instances of Modular FIA.

	 */

	if (tc_has_modular_fia(i915, dig_port)) {

		dig_port->tc_phy_fia = tc_port / 2;

		dig_port->tc_phy_fia_idx = tc_port % 2;

	} else {

		dig_port->tc_phy_fia = FIA1;

		dig_port->tc_phy_fia_idx = tc_port;

	}

}



void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)

{

	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);

drivers/gpu/drm/sun4i/sun4i_tcon.c

+25 −0
Original line number Diff line number Diff line
@@ -689,6 +689,30 @@ static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, 
		     SUN4I_TCON1_BASIC5_V_SYNC(vsync) |

		     SUN4I_TCON1_BASIC5_H_SYNC(hsync));



	/* Setup the polarity of multiple signals */

	if (tcon->quirks->polarity_in_ch0) {

		val = 0;



		if (mode->flags & DRM_MODE_FLAG_PHSYNC)

			val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE;



		if (mode->flags & DRM_MODE_FLAG_PVSYNC)

			val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;



		regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, val);

	} else {

		/* according to vendor driver, this bit must be always set */

		val = SUN4I_TCON1_IO_POL_UNKNOWN;



		if (mode->flags & DRM_MODE_FLAG_PHSYNC)

			val |= SUN4I_TCON1_IO_POL_HSYNC_POSITIVE;



		if (mode->flags & DRM_MODE_FLAG_PVSYNC)

			val |= SUN4I_TCON1_IO_POL_VSYNC_POSITIVE;



		regmap_write(tcon->regs, SUN4I_TCON1_IO_POL_REG, val);

	}



	/* Map output pins to channel 1 */

	regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,

			   SUN4I_TCON_GCTL_IOMAP_MASK,
@@ -1517,6 +1541,7 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { 


static const struct sun4i_tcon_quirks sun8i_r40_tv_quirks = {

	.has_channel_1		= true,

	.polarity_in_ch0	= true,

	.set_mux		= sun8i_r40_tcon_tv_set_mux,

};