Commit a49f6727 authored by Aric Cyr's avatar Aric Cyr Committed by Alex Deucher
Browse files

drm/amd/display: Fix incorrect backlight register offset for DCN 



[Why]
Typo in backlight refactor inctroduced wrong register offset.

[How]
Change DCE to DCN register map for PWRSEQ_REF_DIV

Cc: stable@vger.kernel.org
Signed-off-by: default avatarAric Cyr <aric.cyr@amd.com>
Reviewed-by: default avatarAshley Thomas <Ashley.Thomas2@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 97a9b60f

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

+1 −1
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ 
#define DCN_PANEL_CNTL_REG_LIST()\

	DCN_PANEL_CNTL_SR(PWRSEQ_CNTL, LVTMA), \

	DCN_PANEL_CNTL_SR(PWRSEQ_STATE, LVTMA), \

	DCE_PANEL_CNTL_SR(PWRSEQ_REF_DIV, LVTMA), \

	DCN_PANEL_CNTL_SR(PWRSEQ_REF_DIV, LVTMA), \

	SR(BL_PWM_CNTL), \

	SR(BL_PWM_CNTL2), \

	SR(BL_PWM_PERIOD_CNTL), \