Commit a43f0ac3 authored by Jayesh Choudhary's avatar Jayesh Choudhary Committed by Nishanth Menon
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arm64: dts: ti: k3-j784s4-main: Enable crypto accelerator 



Add the node for SA2UL to support hardware crypto algorithms,
including SHA-1/256/512, AES, 3DES and AEAD suites.
Add rng node for hardware random number generator.

Signed-off-by: default avatarJayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: default avatarKamlesh Gurudasani <kamlesh@ti.com>
Link: https://lore.kernel.org/r/20230314152611.140969-3-j-choudhary@ti.com


Signed-off-by: default avatarNishanth Menon <nm@ti.com>
parent f2de003e

arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -72,6 +72,25 @@ 
		pinctrl-single,function-mask = <0xffffffff>;

	};



	main_crypto: crypto@4e00000 {

		compatible = "ti,j721e-sa2ul";

		reg = <0x00 0x4e00000 0x00 0x1200>;

		power-domains = <&k3_pds 369 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <2>;

		#size-cells = <2>;

		ranges = <0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000>;



		dmas = <&main_udmap 0xca40>, <&main_udmap 0x4a40>,

				<&main_udmap 0x4a41>;

		dma-names = "tx", "rx1", "rx2";



		rng: rng@4e10000 {

			compatible = "inside-secure,safexcel-eip76";

			reg = <0x00 0x4e10000 0x00 0x7d>;

			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

		};

	};



	main_uart0: serial@2800000 {

		compatible = "ti,j721e-uart", "ti,am654-uart";

		reg = <0x00 0x02800000 0x00 0x200>;