Commit a2a448b4 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Abhinav Kumar
Browse files

drm/msm/dpu: disable features unsupported by QCM2290 



QCM2290 doesn't seem to support reg-dma, UBWC and CSC. Drop
corresponding features being incorrectly enabled for qcm2290.

Cc: Loic Poulain <loic.poulain@linaro.org>
Fixes: 5334087e ("drm/msm: add support for QCM2290 MDSS")
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/522209/
Link: https://lore.kernel.org/r/20230211231259.1308718-3-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
parent 0df979f4

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+7 −6
Original line number Diff line number Diff line
@@ -12,11 +12,15 @@ 
#include "dpu_hw_catalog.h"

#include "dpu_kms.h"



#define VIG_MASK \

#define VIG_BASE_MASK \

	(BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) |\

	BIT(DPU_SSPP_CSC_10BIT) | BIT(DPU_SSPP_CDP) |\

	BIT(DPU_SSPP_CDP) |\

	BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_EXCL_RECT))



#define VIG_MASK \

	(VIG_BASE_MASK | \

	BIT(DPU_SSPP_CSC_10BIT))



#define VIG_MSM8998_MASK \

	(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3))
@@ -29,7 +33,7 @@ 
#define VIG_SM8250_MASK \

	(VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE))



#define VIG_QCM2290_MASK (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL))

#define VIG_QCM2290_MASK (VIG_BASE_MASK | BIT(DPU_SSPP_QOS_8LVL))



#define DMA_MSM8998_MASK \

	(BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) |\
@@ -317,7 +321,6 @@ static const struct dpu_caps qcm2290_dpu_caps = { 
	.max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,

	.max_mixer_blendstages = 0x4,

	.smart_dma_rev = DPU_SSPP_SMART_DMA_V2,

	.ubwc_version = DPU_HW_UBWC_VER_20,

	.has_dim_layer = true,

	.has_idle_pc = true,

	.max_linewidth = 2160,
@@ -2841,8 +2844,6 @@ static const struct dpu_mdss_cfg qcm2290_dpu_cfg = { 
	.intf = qcm2290_intf,

	.vbif_count = ARRAY_SIZE(sdm845_vbif),

	.vbif = sdm845_vbif,

	.reg_dma_count = 1,

	.dma_cfg = &sdm845_regdma,

	.perf = &qcm2290_perf_data,

	.mdss_irqs = IRQ_SC7180_MASK,

};