Commit a2098e85 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2021-06-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 



Cross-subsystem Changes:

-  x86/gpu: add JasperLake to gen11 early quirks
  (Although the patch lacks the Ack info, it has been Acked by Borislav)

Driver Changes:

- General DMC improves (Anusha)
- More ADL-P enabling (Vandita, Matt, Jose, Mika, Anusha, Imre, Lucas, Jani, Manasi, Ville, Stanislav)
- Introduce MBUS relative dbuf offset (Ville)
- PSR fixes and improvements (Gwan, Jose, Ville)
- Re-enable LTTPR non-transparent LT mode for DPCD_REV < 1.4 (Ville)
- Remove duplicated declarations (Shaokun, Wan)
- Check HDMI sink deep color capabilities during .mode_valid (Ville)
- Fix display flicker screan related to console and FBC (Chris)
- Remaining conversions of GRAPHICS_VER (Lucas)
- Drop invalid FIXME (Jose)
- Fix bigjoiner check in dsc_disable (Vandita)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YMEy2Ew82BeL/hDK@intel.com
parents 691cf8cd 0d6695b1

Documentation/gpu/i915.rst

+6 −6
Original line number Diff line number Diff line
@@ -210,13 +210,13 @@ DPIO 
.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpio_phy.c

   :doc: DPIO



CSR firmware support for DMC

----------------------------

DMC Firmware Support

--------------------



.. kernel-doc:: drivers/gpu/drm/i915/display/intel_csr.c

   :doc: csr support for dmc

.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c

   :doc: DMC Firmware Support



.. kernel-doc:: drivers/gpu/drm/i915/display/intel_csr.c

.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c

   :internal:



Video BIOS Table (VBT)
@@ -537,7 +537,7 @@ The HuC FW layout is the same as the GuC one, see `GuC Firmware Layout`_ 


DMC

---

See `CSR firmware support for DMC`_

See `DMC Firmware Support`_



Tracing

=======

arch/x86/kernel/early-quirks.c

+1 −0
Original line number Diff line number Diff line
@@ -549,6 +549,7 @@ static const struct pci_device_id intel_early_ids[] __initconst = { 
	INTEL_CNL_IDS(&gen9_early_ops),

	INTEL_ICL_11_IDS(&gen11_early_ops),

	INTEL_EHL_IDS(&gen11_early_ops),

	INTEL_JSL_IDS(&gen11_early_ops),

	INTEL_TGL_12_IDS(&gen11_early_ops),

	INTEL_RKL_IDS(&gen11_early_ops),

	INTEL_ADLS_IDS(&gen11_early_ops),

drivers/gpu/drm/i915/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -201,10 +201,10 @@ i915-y += \ 
	display/intel_combo_phy.o \

	display/intel_connector.o \

	display/intel_crtc.o \

	display/intel_csr.o \

	display/intel_cursor.o \

	display/intel_display.o \

	display/intel_display_power.o \

	display/intel_dmc.o \

	display/intel_dpio_phy.o \

	display/intel_dpll.o \

	display/intel_dpll_mgr.o \
@@ -263,6 +263,7 @@ i915-y += \ 
	display/intel_lvds.o \

	display/intel_panel.o \

	display/intel_pps.o \

	display/intel_qp_tables.o \

	display/intel_sdvo.o \

	display/intel_tv.o \

	display/intel_vdsc.o \

drivers/gpu/drm/i915/display/icl_dsi.c

+19 −2
Original line number Diff line number Diff line
@@ -363,10 +363,19 @@ static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder, 
	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);

	enum port port;

	int afe_clk_khz;

	u32 esc_clk_div_m;

	int theo_word_clk, act_word_clk;

	u32 esc_clk_div_m, esc_clk_div_m_phy;



	afe_clk_khz = afe_clk(encoder, crtc_state);



	if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) {

		theo_word_clk = DIV_ROUND_UP(afe_clk_khz, 8 * DSI_MAX_ESC_CLK);

		act_word_clk = max(3, theo_word_clk + (theo_word_clk + 1) % 2);

		esc_clk_div_m = act_word_clk * 8;

		esc_clk_div_m_phy = (act_word_clk - 1) / 2;

	} else {

		esc_clk_div_m = DIV_ROUND_UP(afe_clk_khz, DSI_MAX_ESC_CLK);

	}



	for_each_dsi_port(port, intel_dsi->ports) {

		intel_de_write(dev_priv, ICL_DSI_ESC_CLK_DIV(port),
@@ -379,6 +388,14 @@ static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder, 
			       esc_clk_div_m & ICL_ESC_CLK_DIV_MASK);

		intel_de_posting_read(dev_priv, ICL_DPHY_ESC_CLK_DIV(port));

	}



	if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) {

		for_each_dsi_port(port, intel_dsi->ports) {

			intel_de_write(dev_priv, ADL_MIPIO_DW(port, 8),

				       esc_clk_div_m_phy & TX_ESC_CLK_DIV_PHY);

			intel_de_posting_read(dev_priv, ADL_MIPIO_DW(port, 8));

		}

	}

}



static void get_dsi_io_power_domains(struct drm_i915_private *dev_priv,

drivers/gpu/drm/i915/display/intel_atomic.c

+20 −0
Original line number Diff line number Diff line
@@ -187,6 +187,26 @@ intel_connector_needs_modeset(struct intel_atomic_state *state, 
									    new_conn_state->crtc)));

}



/**

 * intel_any_crtc_needs_modeset - check if any CRTC needs a modeset

 * @state: the atomic state corresponding to this modeset

 *

 * Returns true if any CRTC in @state needs a modeset.

 */

bool intel_any_crtc_needs_modeset(struct intel_atomic_state *state)

{

	struct intel_crtc *crtc;

	struct intel_crtc_state *crtc_state;

	int i;



	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

		if (intel_crtc_needs_modeset(crtc_state))

			return true;

	}



	return false;

}



struct intel_digital_connector_state *

intel_atomic_get_digital_connector_state(struct intel_atomic_state *state,

					 struct intel_connector *connector)