irqchip/gic-v3-its: Make is_v4 use a TYPER copy

mainline inclusion
from mainline-v5.5-rc1
commit 0dd57fed
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I7C103



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Instead of caching the GICv4 compatibility in a discrete way, cache the
TYPER register instead, which can then be used to implement the same
functionality. This will get used more extensively in subsequent patches.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20191027144234.8395-5-maz@kernel.org
Link: https://lore.kernel.org/r/20191108165805.3071-5-maz@kernel.org


Signed-off-by: Xiaodong Li <lixiaodong67@huawei.com>