KVM: arm64: GICv4.1: Add direct injection capability to PPI registers

virt inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8K89F


CVE: NA

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Most of the GICv3 emulation code that deals with timer interrupts now
has to be aware of the HiSilicon direct vtimer capabilities in order
to benefit from it.

Add such support, keyed on the interrupt having the non-NULL vtimer_info.
Except for the uaccess save path for ISPENDR0 and ISACTIVER0 registers,
I haven't taken too much care of the userspace save/restore path yet...

Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: wanghaibin <wanghaibin.wang@huawei.com>
Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com>
Signed-off-by: Dongxu Sun <sundongxu3@huawei.com>