Unverified Commit 9dd7a5a8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'visconti-arm-dt-for-v5.19' of... 

Merge tag 'visconti-arm-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt

Visconti device tree updates for 5.19

- Update the clock providers for PCIe host controller
- Update the clock providers for ethernet device
- Update the clock providers for SPI
- Update the clock providers for watchdog timer
- Update the clock providers for I2C
- Update the clock providers for UART
- Add clock controller support for TMPV7708

* tag 'visconti-arm-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti:
  arm64: dts: visconti: Update the clock providers for PCIe host controller
  arm64: dts: visconti: Update the clock providers for ethernet device
  arm64: dts: visconti: Update the clock providers for SPI
  arm64: dts: visconti: Update the clock providers for watchdog timer
  arm64: dts: visconti: Update the clock providers for I2C
  arm64: dts: visconti: Update the clock providers for UART
  arm64: dts: visconti: Add clock controller support for TMPV7708

Link: https://lore.kernel.org/r/TYWPR01MB94201E842A2F8E5E9EBF740D92C99@TYWPR01MB9420.jpnprd01.prod.outlook.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 045d0c3d 5d3b6ede

arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts

+0 −9
Original line number Diff line number Diff line
@@ -32,22 +32,16 @@ 


&uart0 {

	status = "okay";

	clocks = <&uart_clk>;

	clock-names = "apb_pclk";

};



&uart1 {

	status = "okay";

	clocks = <&uart_clk>;

	clock-names = "apb_pclk";

};



&piether {

	status = "okay";

	phy-handle = <&phy0>;

	phy-mode = "rgmii-id";

	clocks = <&clk300mhz>, <&clk125mhz>;

	clock-names = "stmmaceth", "phy_ref_clk";



	mdio0 {

		#address-cells = <1>;
@@ -62,7 +56,6 @@ 


&wdt {

	status = "okay";

	clocks = <&wdt_clk>;

};



&gpio {
@@ -79,6 +72,4 @@ 


&pcie {

	status = "okay";

	clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;

	clock-names = "ref", "core", "aux";

};

arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts

+0 −6
Original line number Diff line number Diff line
@@ -32,22 +32,16 @@ 


&uart0 {

	status = "okay";

	clocks = <&uart_clk>;

	clock-names = "apb_pclk";

};



&uart1 {

	status = "okay";

	clocks = <&uart_clk>;

	clock-names = "apb_pclk";

};



&piether {

	status = "okay";

	phy-handle = <&phy0>;

	phy-mode = "rgmii-id";

	clocks = <&clk300mhz>, <&clk125mhz>;

	clock-names = "stmmaceth", "phy_ref_clk";



	mdio0 {

		#address-cells = <1>;

arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ 


&wdt {

	status = "okay";

	clocks = <&wdt_clk>;

};



&gpio {
@@ -26,8 +25,6 @@ 


&spi0 {

	status = "okay";

	clocks = <&clk300mhz>, <&clk150mhz>;

	clock-names = "sspclk", "apb_pclk";



	mmc-slot@0 {

		compatible = "mmc-spi-slot";
@@ -40,5 +37,4 @@ 


&i2c0 {

	status = "okay";

	clocks = <&clk150mhz>;

};

arch/arm64/boot/dts/toshiba/tmpv7708.dtsi

+53 −43
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 *

 */



#include <dt-bindings/clock/toshiba,tmpv770x.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -128,47 +129,6 @@ 
			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;

	};



	uart_clk: uart-clk {

		compatible = "fixed-clock";

		clock-frequency = <150000000>;

		#clock-cells = <0>;

	};



	clk25mhz: clk25mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <25000000>;

		clock-output-names = "clk25mhz";

	};



	clk125mhz: clk125mhz {

		compatible = "fixed-clock";

		clock-frequency = <125000000>;

		#clock-cells = <0>;

		clock-output-names = "clk125mhz";

	};



	clk150mhz: clk150mhz {

		compatible = "fixed-clock";

		clock-frequency = <150000000>;

		#clock-cells = <0>;

		clock-output-names = "clk150mhz";

	};



	clk300mhz: clk300mhz {

		compatible = "fixed-clock";

		clock-frequency = <300000000>;

		#clock-cells = <0>;

		clock-output-names = "clk300mhz";

	};



	clk600mhz: clk600mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <600000000>;

		clock-output-names = "clk600mhz";

	};



	extclk100mhz: extclk100mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;
@@ -176,9 +136,9 @@ 
		clock-output-names = "extclk100mhz";

	};



	wdt_clk: wdt-clk {

	osc2_clk: osc2-clk {

		compatible = "fixed-clock";

		clock-frequency = <150000000>;

		clock-frequency = <20000000>;

		#clock-cells = <0>;

	};
@@ -216,12 +176,28 @@ 
			interrupt-parent = <&gic>;

		};



		pipllct: clock-controller@24220000 {

			compatible = "toshiba,tmpv7708-pipllct";

			reg = <0 0x24220000 0 0x820>;

			#clock-cells = <1>;

			clocks = <&osc2_clk>;

		};



		pismu: syscon@24200000 {

			compatible = "toshiba,tmpv7708-pismu", "syscon";

			reg = <0 0x24200000 0 0x2140>;

			#clock-cells = <1>;

			#reset-cells = <1>;

		};



		uart0: serial@28200000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0 0x28200000 0 0x1000>;

			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&uart0_pins>;

			clocks = <&pismu TMPV770X_CLK_PIUART0>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -231,6 +207,8 @@ 
			interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&uart1_pins>;

			clocks = <&pismu TMPV770X_CLK_PIUART1>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -240,6 +218,8 @@ 
			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&uart2_pins>;

			clocks = <&pismu TMPV770X_CLK_PIUART2>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -249,6 +229,8 @@ 
			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&uart3_pins>;

			clocks = <&pismu TMPV770X_CLK_PIUART2>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -261,6 +243,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C0>;

			status = "disabled";

		};
@@ -273,6 +256,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C1>;

			status = "disabled";

		};
@@ -285,6 +269,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C2>;

			status = "disabled";

		};
@@ -297,6 +282,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C3>;

			status = "disabled";

		};
@@ -309,6 +295,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C4>;

			status = "disabled";

		};
@@ -321,6 +308,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C5>;

			status = "disabled";

		};
@@ -333,6 +321,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C6>;

			status = "disabled";

		};
@@ -345,6 +334,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C7>;

			status = "disabled";

		};
@@ -357,6 +347,7 @@ 
			clock-frequency = <400000>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PII2C8>;

			status = "disabled";

		};
@@ -369,6 +360,8 @@ 
			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PISPI1>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -381,6 +374,8 @@ 
			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PISPI1>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -393,6 +388,8 @@ 
			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PISPI2>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -405,6 +402,8 @@ 
			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PISPI3>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -417,6 +416,8 @@ 
			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PISPI4>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -429,6 +430,8 @@ 
			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PISPI5>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -441,6 +444,8 @@ 
			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&pismu TMPV770X_CLK_PISPI6>;

			clock-names = "apb_pclk";

			status = "disabled";

		};
@@ -452,12 +457,15 @@ 
			snps,txpbl = <4>;

			snps,rxpbl = <4>;

			snps,tso;

			clocks = <&pismu TMPV770X_CLK_PIETHER_BUS>, <&pismu TMPV770X_CLK_PIETHER_125M>;

			clock-names = "stmmaceth", "phy_ref_clk";

			status = "disabled";

		};



		wdt: wdt@28330000 {

			compatible = "toshiba,visconti-wdt";

			reg = <0 0x28330000 0 0x1000>;

			clocks = <&pismu TMPV770X_CLK_WDTCLK>;

			status = "disabled";

		};
@@ -498,6 +506,8 @@ 
				 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH

				 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;

			max-link-speed = <2>;

			clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>;

			clock-names = "ref", "core", "aux";

			status = "disabled";

		};

	};