Commit 5d3b6ede authored by Nobuhiro Iwamatsu's avatar Nobuhiro Iwamatsu
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arm64: dts: visconti: Update the clock providers for PCIe host controller 



Remove fixed clock and source common clock for PCIe host controller.

Signed-off-by: default avatarNobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-7-nobuhiro1.iwamatsu@toshiba.co.jp/
parent c8a93f91

arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts

+0 −2
Original line number Diff line number Diff line
@@ -72,6 +72,4 @@ 


&pcie {

	status = "okay";

	clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;

	clock-names = "ref", "core", "aux";

};

arch/arm64/boot/dts/toshiba/tmpv7708.dtsi

+2 −14
Original line number Diff line number Diff line
@@ -129,20 +129,6 @@ 
			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;

	};



	clk25mhz: clk25mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <25000000>;

		clock-output-names = "clk25mhz";

	};



	clk600mhz: clk600mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <600000000>;

		clock-output-names = "clk600mhz";

	};



	extclk100mhz: extclk100mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;
@@ -520,6 +506,8 @@ 
				 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH

				 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;

			max-link-speed = <2>;

			clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>;

			clock-names = "ref", "core", "aux";

			status = "disabled";

		};

	};