Merge tag 'media/v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media (9bcbf894) · Commits · EulixOS / Software / Kernel

.mailmap

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		@@ -44,6 +44,7 @@ Andrew Vasquez <andrew.vasquez@qlogic.com>
		Andrey Konovalov <andreyknvl@gmail.com> <andreyknvl@google.com>
		Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
		Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
		Andrzej Hajda <andrzej.hajda@intel.com> <a.hajda@samsung.com>
		Andy Adamson <andros@citi.umich.edu>
		Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com>
		Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com>

Documentation/admin-guide/media/platform-cardlist.rst

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		@@ -60,6 +60,7 @@ s5p-mfc Samsung S5P MFC Video Codec
		sh_veu SuperH VEU mem2mem video processing
		sh_vou SuperH VOU video output
		stm32-dcmi STM32 Digital Camera Memory Interface (DCMI)
		stm32-dma2d STM32 Chrom-Art Accelerator Unit
		sun4i-csi Allwinner A10 CMOS Sensor Interface Support
		sun6i-csi Allwinner V3s Camera Sensor Interface
		sun8i-di Allwinner Deinterlace

Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml

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		@@ -20,6 +20,7 @@ properties:
		- allwinner,sun8i-h3-video-engine
		- allwinner,sun8i-v3s-video-engine
		- allwinner,sun8i-r40-video-engine
		- allwinner,sun20i-d1-video-engine
		- allwinner,sun50i-a64-video-engine
		- allwinner,sun50i-h5-video-engine
		- allwinner,sun50i-h6-video-engine

Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml

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		# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

		%YAML 1.2
		---
		$id: "http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#"
		$schema: "http://devicetree.org/meta-schemas/core.yaml#"

		title: Hantro G2 VPU codec implemented on Allwinner H6 SoC

		maintainers:
		- Jernej Skrabec <jernej.skrabec@gmail.com>

		description:
		Hantro G2 video decode accelerator present on Allwinner H6 SoC.

		properties:
		compatible:
		const: allwinner,sun50i-h6-vpu-g2

		reg:
		maxItems: 1

		interrupts:
		maxItems: 1

		clocks:
		items:
		- description: Bus Clock
		- description: Module Clock

		clock-names:
		items:
		- const: bus
		- const: mod

		resets:
		maxItems: 1

		required:
		- compatible
		- reg
		- interrupts
		- clocks
		- clock-names
		- resets

		additionalProperties: false

		examples:
		- \|
		#include <dt-bindings/interrupt-controller/arm-gic.h>
		#include <dt-bindings/clock/sun50i-h6-ccu.h>
		#include <dt-bindings/reset/sun50i-h6-ccu.h>

		video-codec-g2@1c00000 {
		compatible = "allwinner,sun50i-h6-vpu-g2";
		reg = <0x01c00000 0x1000>;
		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>;
		clock-names = "bus", "mod";
		resets = <&ccu RST_BUS_VP9>;
		};

		...

Documentation/devicetree/bindings/media/i2c/adv748x.txt

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		* Analog Devices ADV748X video decoder with HDMI receiver

		The ADV7481 and ADV7482 are multi format video decoders with an integrated
		HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB
		from three input sources HDMI, analog and TTL.

		Required Properties:

		- compatible: Must contain one of the following
		- "adi,adv7481" for the ADV7481
		- "adi,adv7482" for the ADV7482

		- reg: I2C slave addresses
		The ADV748x has up to twelve 256-byte maps that can be accessed via the
		main I2C ports. Each map has it own I2C address and acts as a standard
		slave device on the I2C bus. The main address is mandatory, others are
		optional and remain at default values if not specified.

		Optional Properties:

		- interrupt-names: Should specify the interrupts as "intrq1", "intrq2" and/or
		"intrq3". All interrupts are optional. The "intrq3" interrupt
		is only available on the adv7481
		- interrupts: Specify the interrupt lines for the ADV748x
		- reg-names : Names of maps with programmable addresses.
		It shall contain all maps needing a non-default address.
		Possible map names are:
		"main", "dpll", "cp", "hdmi", "edid", "repeater",
		"infoframe", "cbus", "cec", "sdp", "txa", "txb"

		The device node must contain one 'port' child node per device input and output
		port, in accordance with the video interface bindings defined in
		Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes
		are numbered as follows.

		Name Type Port
		---------------------------------------
		AIN0 sink 0
		AIN1 sink 1
		AIN2 sink 2
		AIN3 sink 3
		AIN4 sink 4
		AIN5 sink 5
		AIN6 sink 6
		AIN7 sink 7
		HDMI sink 8
		TTL sink 9
		TXA source 10
		TXB source 11

		The digital output port nodes, when present, shall contain at least one
		endpoint. Each of those endpoints shall contain the data-lanes property as
		described in video-interfaces.txt.

		Required source endpoint properties:
		- data-lanes: an array of physical data lane indexes
		The accepted value(s) for this property depends on which of the two
		sources are described. For TXA 1, 2 or 4 data lanes can be described
		while for TXB only 1 data lane is valid. See video-interfaces.txt
		for detailed description.

		Ports are optional if they are not connected to anything at the hardware level.

		Example:

		video-receiver@70 {
		compatible = "adi,adv7482";
		reg = <0x70 0x71 0x72 0x73 0x74 0x75
		0x60 0x61 0x62 0x63 0x64 0x65>;
		reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
		"infoframe", "cbus", "cec", "sdp", "txa", "txb";

		#address-cells = <1>;
		#size-cells = <0>;

		interrupt-parent = <&gpio6>;
		interrupt-names = "intrq1", "intrq2";
		interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
		<31 IRQ_TYPE_LEVEL_LOW>;

		port@7 {
		reg = <7>;

		adv7482_ain7: endpoint {
		remote-endpoint = <&cvbs_in>;
		};
		};

		port@8 {
		reg = <8>;

		adv7482_hdmi: endpoint {
		remote-endpoint = <&hdmi_in>;
		};
		};

		port@a {
		reg = <10>;

		adv7482_txa: endpoint {
		clock-lanes = <0>;
		data-lanes = <1 2 3 4>;
		remote-endpoint = <&csi40_in>;
		};
		};

		port@b {
		reg = <11>;

		adv7482_txb: endpoint {
		clock-lanes = <0>;
		data-lanes = <1>;
		remote-endpoint = <&csi20_in>;
		};
		};
		};