!622 Intel: Add PMU support for Intel Emerald Rapids

Merge Pull Request from: @yunyingsun 
 
Title: Add PMU support for Intel Emerald Rapids
 
Content:
This PR adds Performance Monitoring Unit(PMU) support for next Intel Xeon platform Emerald Rapids.

Totally 6 commits, including 4 EMR PMU enabling patches from v6.2 and 2 dependent patches from v5.14/v5.18:
(v6.2-rc6) 5a8a05f1 perf/x86/intel/cstate: Add Emerald Rapids
	(v5.18-rc4) 528c9f1d perf/x86/cstate: Add SAPPHIRERAPIDS_X CPU support
	(v5.14-rc1) 87bf399f perf/x86/cstate: Add ICELAKE_X and ICELAKE_D support
(v6.2-rc6) 6795e558 perf/x86/intel: Add Emerald Rapids
(v6.2-rc4) 5268a284 perf/x86/intel/uncore: Add Emerald Rapids
(v6.2-rc4) 69ced416 perf/x86/msr: Add Emerald Rapids

The four 6.2 patches above use a macro "INTEL_FAM6_EMERALDRAPIDS_X", which is introduced by:
(v6.1-rc1) 7beade0d x86/cpu: Add several Intel server CPU model numbers
This patch is already included in another PR:
https://gitee.com/openeuler/kernel/pulls/469

Note: this PR for PMU must be merged AFTER PR-469, otherwise there will be kernel compiling error complaining for missing definition of macro "INTEL_FAM6_EMERALDRAPIDS_X".

Intel-kernel issue:
https://gitee.com/openeuler/intel-kernel/issues/I6YO4Z
 
Test:
1. platform dependent core PMU event works with perf, like "L1-dcache-loads".
2. platform dependent uncore PMU event works with perf, like "uncore_imc_0/event=0x1/".
3. offcore event works with perf.
3. PEBS works with perf.
4. topdown works with perf.
With this PR(along with the patch from PR469) applied to kernel OLK-5.10, all tests above PASS on EMR.

Known issue:
N/A
 
Default config change:
N/A


 
 
Link:https://gitee.com/openeuler/kernel/pulls/622

 

Reviewed-by: Jason Zeng <jason.zeng@intel.com>
Reviewed-by: Aichun Shi <aichun.shi@intel.com>
Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com>