Commit 224a8e94 authored by Kan Liang's avatar Kan Liang Committed by Yunying Sun
Browse files

perf/x86/intel/cstate: Add Emerald Rapids 

mainline inclusion
from mainline-v6.2-rc6
commit 5a8a05f1
category: feature
feature: EMR PMU support
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I6YO4Z
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=5a8a05f165fb18d37526062419774d9088c2a9b9



Intel-SIG: commit 5a8a05f1 perf/x86/intel/cstate: Add Emerald
Rapids
Backport for adding EMR PMU support to OLK-5.10 kernel.

-------------------------------------

From the perspective of Intel cstate residency counters,
Emerald Rapids is the same as the Sapphire Rapids and Ice Lake.
Add Emerald Rapids model.

Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20230106160449.3566477-2-kan.liang@linux.intel.com


Signed-off-by: default avatarYunying Sun <yunying.sun@intel.com>
parent fc3a2990

arch/x86/events/intel/cstate.c

+1 −0
Original line number Diff line number Diff line
@@ -658,6 +658,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { 
	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&icx_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&icl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&icl_cstates),