Commit 97eba3c1 authored by Zhang Rui's avatar Zhang Rui Committed by Xiaolong Wang
Browse files

powercap: intel_rapl: Introduce core support for TPMI interface

mainline inclusion
from mainline-v6.5-rc1
commit e12dee18
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I92135

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e12dee18b89f1b0d4fc070eda4843f9d806645ca



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Compared with existing RAPL MSR/MMIO Interface, the RAPL TPMI Interface
1. has per Power Limit register, thus has per Power Limit Lock and
   Enable bit.
2. doesn't have Power Limit Clamp bit.
3. the Power Limit Lock and Enable bits have different bit offsets.
These mean RAPL TPMI Interface needs its own primitive information.

RAPL TPMI Interface also has per domain unit register but with a
different register layout. This requires a TPMI specific rapl_defaults
call to decode the unit register.

Introduce the RAPL core support for TPMI Interface.

Intel-SIG: commit e12dee18 powercap: intel_rapl: Introduce core support for TPMI interface.
Backport Intel RAPL driver support on TPMI.

Signed-off-by: default avatarZhang Rui <rui.zhang@intel.com>
Tested-by: default avatarWang Wendy <wendy.wang@intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
[ Xiaolong Wang: amend commit log ]
Signed-off-by: default avatarXiaolong Wang <xiaolong.wang@intel.com>
parent aef9fc08
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