Unverified Commit 977389aa authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt64-5.19' of... 

Merge tag 'imx-dt64-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree update for 5.19:

- New board support: Engicam i.Core MX8M Plus SoM and EDIMM2.2 Starter
  Kit, Toradex Verdin i.MX8M Plus devices, Data Modul i.MX8M Mini eDM SBC,
  Verdin based MX8Menlo, 8MNANOD3L EVK, i.MX8M Plus Gateworks GW7400.
- Enable RTS-CTS on UART3 for imx8mm-beacon and imx8mn-beacon boards.
- Enable HS400-ES support for i.MX8MN and i.MX8MP uSDHC devices by
  updating the compatible.
- A few updates on imx8mq-librem5 to increase boost regulation
  current, add panel compatible for r4 ("Evergreen") revision and volume
  buttons a wakeup source.
- Clean up vendor specific 'fsl,uart-has-rtscts' property by using
  standard 'uart-has-rtscts'.
- Add GPC, GPU, MEDIAMIX, and HSIO power domains for i.MX8M Plus SoC.
- A series from Marcel Ziswiler to improve imx8mm-verdin support,
  including cosmetic changes and functional improvements like SD1 sleep
  pinctrl and fully validated IOMUX configuration.
- Add PWM polarity inversion support for i.MX8 SoCs.
- A couple of changes from Michael Walle to update PMIC output names and
  min/max voltages for imx8mn-evk board.
- A series from Tim Harvey to improve imx8mm-venice boards, add missing
  uart-has-rtscts property to UARTs, clock-names to pcie_phy, and
  vdd_5p0 ADC channel.
- Add VPU codec  devices for i.MX8QXP SoC.
- Other small and random changes.

* tag 'imx-dt64-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (65 commits)
  arm64: dt: imx8mp: support pwm polarity inversion
  arm64: dt: imx8mn: support pwm polarity inversion
  arm64: dt: imx8mm: support pwm polarity inversion
  arm64: dt: imx8mq: support pwm polarity inversion
  arm64: dts: imx8mm-venice-gw7901: remove unnecessary cpu temp override
  arm64: dts: imx8mm-venice-gw7902: add vdd_5p0 ADC channel
  arm64: dts: imx8m*venice: add missing clock-names to pcie_phy
  arm64: dts: imx8mm-venice-gw7902: fix pcie bindings
  arm64: dts: freescale: reduce the interrup-map-mask
  arm64: dts: imx8mn-beacon: Enable RTS-CTS on UART3
  arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
  arm64: dts: imx8mm: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC
  arm64: dts: imx8mm: Disable USB2 OC on Data Modul i.MX8M Mini eDM SBC
  arm64: dts: imx8mm: Add CPLD on MX8Menlo board
  arm64: dts: imx8mq-kontron-pitx-imx8m: Use the standard 'uart-has-rtscts'
  arm64: dts: imx8mp-verdin: Use the standard 'uart-has-rtscts'
  arm64: dts: imx8mp: Add MEDIA_BLK_CTRL
  arm64: dts: imx8mp: Add MEDIAMIX power domains
  arm64: dts: imx8mp: add HSIO power-domains
  arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
  ...

Link: https://lore.kernel.org/r/20220508033843.2773685-4-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 31df43ef d80b9c84

arch/arm64/boot/dts/freescale/Makefile

+9 −0
Original line number Diff line number Diff line
@@ -49,12 +49,14 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb 
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb



dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
@@ -72,12 +74,19 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr3l-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dahlia.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-kontron-pitx-imx8m.dtb

arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts

+9 −0
Original line number Diff line number Diff line
@@ -311,10 +311,19 @@ 
	status = "okay";

};



&mscc_felix_port4 {

	dsa-tag-protocol = "ocelot-8021q";

};



&mscc_felix_port5 {

	dsa-tag-protocol = "ocelot-8021q";

};



&usb0 {

	status = "okay";

};



&usb1 {

	dr_mode = "host";

	status = "okay";

};

arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts

+2 −0
Original line number Diff line number Diff line
@@ -382,9 +382,11 @@ 
};



&usb0 {

	dr_mode = "host";

	status = "okay";

};



&usb1 {

	dr_mode = "host";

	status = "okay";

};

arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts

+1 −1
Original line number Diff line number Diff line
@@ -299,10 +299,10 @@ 
};



&usb0 {

	dr_mode = "host";

	status = "okay";

};



&usb1 {

	dr_mode = "otg";

	status = "okay";

};

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+0 −2
Original line number Diff line number Diff line
@@ -599,7 +599,6 @@ 
			compatible = "fsl,ls1028a-dwc3", "snps,dwc3";

			reg = <0x0 0x3100000 0x0 0x10000>;

			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

			dr_mode = "host";

			snps,dis_rxdet_inp3_quirk;

			snps,quirk-frame-length-adjustment = <0x20>;

			snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
@@ -610,7 +609,6 @@ 
			compatible = "fsl,ls1028a-dwc3", "snps,dwc3";

			reg = <0x0 0x3110000 0x0 0x10000>;

			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;

			dr_mode = "host";

			snps,dis_rxdet_inp3_quirk;

			snps,quirk-frame-length-adjustment = <0x20>;

			snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;