Commit d80b9c84 authored by Markus Niebel's avatar Markus Niebel Committed by Shawn Guo
Browse files

arm64: dt: imx8mp: support pwm polarity inversion 



The i.MX8M Plus has the same PWM IP as i.MX6 / i.MX7. This IP
and the driver supporting pwm polarity inversion. Switch CPU
device tree fragment to use 3 pwm-cells.

Tested on MBa8MPxL mainboard.

Signed-off-by: default avatarMarkus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 6bc1e580

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -615,7 +615,7 @@ 
				clocks = <&clk IMX8MP_CLK_PWM1_ROOT>,

					 <&clk IMX8MP_CLK_PWM1_ROOT>;

				clock-names = "ipg", "per";

				#pwm-cells = <2>;

				#pwm-cells = <3>;

				status = "disabled";

			};
@@ -626,7 +626,7 @@ 
				clocks = <&clk IMX8MP_CLK_PWM2_ROOT>,

					 <&clk IMX8MP_CLK_PWM2_ROOT>;

				clock-names = "ipg", "per";

				#pwm-cells = <2>;

				#pwm-cells = <3>;

				status = "disabled";

			};
@@ -637,7 +637,7 @@ 
				clocks = <&clk IMX8MP_CLK_PWM3_ROOT>,

					 <&clk IMX8MP_CLK_PWM3_ROOT>;

				clock-names = "ipg", "per";

				#pwm-cells = <2>;

				#pwm-cells = <3>;

				status = "disabled";

			};
@@ -648,7 +648,7 @@ 
				clocks = <&clk IMX8MP_CLK_PWM4_ROOT>,

					 <&clk IMX8MP_CLK_PWM4_ROOT>;

				clock-names = "ipg", "per";

				#pwm-cells = <2>;

				#pwm-cells = <3>;

				status = "disabled";

			};